This is the mail archive of the
mailing list for the GCC project.
Re: [Patch AArch64] Fix register constraints for lane intrinsics.
- From: Marcus Shawcroft <marcus dot shawcroft at gmail dot com>
- To: James Greenhalgh <james dot greenhalgh at arm dot com>
- Cc: "gcc-patches at gcc dot gnu dot org" <gcc-patches at gcc dot gnu dot org>
- Date: Fri, 6 Sep 2013 11:47:16 +0100
- Subject: Re: [Patch AArch64] Fix register constraints for lane intrinsics.
- Authentication-results: sourceware.org; auth=none
- References: <1378455486-23723-1-git-send-email-james dot greenhalgh at arm dot com>
On 6 September 2013 09:18, James Greenhalgh <firstname.lastname@example.org> wrote:
> Most of the vector-by-element instructions in AArch64 have the restriction
> that, if the vector they are taking an element from has type "h"
> then it must be in a register from the lower half of the vector register
> set (i.e. v0-v15). While we have imposed that restriction in places, we
> have not been consistent.
> Fix that.
> Tested with aarch64.exp with no regressions.
> OK for trunk?