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Re: MIPS elimate trap-if-zero instruction if possible for divisions

On 07/10/2013 09:38 AM, Graham Stott wrote:
Hi Jeff, Richard,

Not sure if that working.

I created some rtl using TRAP_IF to represent the TEQ and emiited via an expander

The TRAP_IF rtl make ait all the way though the rtl optimizers which are run after expand
even though it should be possible to determine is false.

(insn 7 3 20 2 (set (reg:SI 2 $2 [201])
         (const_int 27 [0x1b])) bug.c:67 289 {*movsi_internal}
      (expr_list:REG_EQUIV (const_int 27 [0x1b])

(insn 20 7 21 2 (trap_if (eq:SI (reg:SI 2 $2 [201])
             (const_int 0 [0]))
         (const_int 7 [0x7])) bug.c:68 8 {*conditional_trapNsi_if_zero}

I grepped the RTL code for any code handling TRAP_IF that looked like it might remove the TRAP_IF but
only found some code is final_scan which only applied to CC0 backends.

Is using a conditional trap (TRAP_IF)  the right way to go?
I'd guess that the generic RTL optimizers didn't know how to handle
(trap_if (eq (const_int 27) (const_int 0))

I'd like CSE would be the place to catch the majority of these things. Yet a grep doesn't show any TRAP_IF support. So you'll probably need to add it. fold_rtx comes to mind as a possible place to add this capability.


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