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Re: [PATCH, rs6000] PR target/57150, do not use VSX instructions for long double caller saves


On Wed, Jul 03, 2013 at 04:09:53PM +0000, Joseph S. Myers wrote:
> On Fri, 3 May 2013, Michael Meissner wrote:
> 
> > 2013-05-03  Michael Meissner  <meissner@linux.vnet.ibm.com>
> > 
> > 	PR target/57150
> > 	* config/rs6000/rs6000.h (HARD_REGNO_CALLER_SAVE_MODE): Use DFmode
> > 	to save TFmode registers and DImode to save TImode registers for
> > 	caller save operations.
> > 	(HARD_REGNO_CALL_PART_CLOBBERED): TFmode and TDmode do not need to
> > 	mark being partially clobbered since they only use the first
> > 	double word.
> > 
> > 	* config/rs6000/rs6000.c (rs6000_init_hard_regno_mode_ok): TFmode
> > 	and TDmode only use the upper 64-bits of each VSX register.
> 
> That change has the effect that reload thinks TFmode (and no doubt
> TDmode) only takes two registers even when in general registers,
> causing a segfault in glibc's test-ldouble built for soft float.

Sorry about that.  Thanks for catching it.

-- 
Michael Meissner, IBM
IBM, M/S 2506R, 550 King Street, Littleton, MA 01460, USA
email: meissner@linux.vnet.ibm.com, phone: +1 (978) 899-4797


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