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Re: [PATCH, rs6000] PR target/57150, do not use VSX instructions for long double caller saves

On Wed, Jul 3, 2013 at 12:09 PM, Joseph S. Myers
<> wrote:
> On Fri, 3 May 2013, Michael Meissner wrote:
>> 2013-05-03  Michael Meissner  <>
>>       PR target/57150
>>       * config/rs6000/rs6000.h (HARD_REGNO_CALLER_SAVE_MODE): Use DFmode
>>       to save TFmode registers and DImode to save TImode registers for
>>       caller save operations.
>>       (HARD_REGNO_CALL_PART_CLOBBERED): TFmode and TDmode do not need to
>>       mark being partially clobbered since they only use the first
>>       double word.
>>       * config/rs6000/rs6000.c (rs6000_init_hard_regno_mode_ok): TFmode
>>       and TDmode only use the upper 64-bits of each VSX register.
> That change has the effect that reload thinks TFmode (and no doubt
> TDmode) only takes two registers even when in general registers,
> causing a segfault in glibc's test-ldouble built for soft float.
> I'm testing this patch (this diff is against 4.8 branch) to fix this;
> at least, it fixes the glibc testing issue.  Since the original patch
> went on 4.7 and 4.8 branches as well as trunk, I propose this patch
> for the branches as well as trunk.  You may wish to test it in your
> original VSX configuration.
> 2013-07-03  Joseph Myers  <>
>         * config/rs6000/rs6000.c (rs6000_init_hard_regno_mode_ok): Only
>         adjust register size for TDmode and TFmode for VSX registers.

I thought that you already were applying it, not asking for approval.
The patch is okay.

TFmode and TImode on VSX need some TLC.

- David

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