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Re: [PATCH, rs6000] power8 patches, patch #8, power8 load fusion + misc.
- From: David Edelsohn <dje dot gcc at gmail dot com>
- To: Michael Meissner <meissner at linux dot vnet dot ibm dot com>, GCC Patches <gcc-patches at gcc dot gnu dot org>, David Edelsohn <dje dot gcc at gmail dot com>, Pat Haugen <pthaugen at us dot ibm dot com>, Peter Bergner <bergner at vnet dot ibm dot com>
- Date: Tue, 18 Jun 2013 14:30:49 -0400
- Subject: Re: [PATCH, rs6000] power8 patches, patch #8, power8 load fusion + misc.
- References: <20130520204053 dot GA21090 at ibm-tiger dot the-meissners dot org> <20130522205258 dot GA11470 at ibm-tiger dot the-meissners dot org>
On Wed, May 22, 2013 at 4:52 PM, Michael Meissner
<meissner@linux.vnet.ibm.com> wrote:
> 2013-05-22 Michael Meissner <meissner@linux.vnet.ibm.com>
>
> * config/rs6000/predicates.md (fusion_gpr_addis): New predicates
> to support power8 load fusion.
> (fusion_gpr_mem_load): Likewise.
>
> * config/rs6000/rs6000-modes.def (PTImode): Update a comment.
>
> * config/rs6000/rs6000-protos.h (fusion_gpr_load_p): New
> declarations for power8 load fusion.
> (emit_fusion_gpr_load): Likewise.
>
> * config/rs6000/rs6000.opt (-mlra): New undocumented switch to
> turn on using the LRA register allocator.
> (-mconstrain-regs): New undocumented switch to constrain
> non-integer values from being loaded into the LR or CTR registers.
This really should have been a separate patch.
> * config/rs6000/rs6000.c (TARGET_LRA_P): If -mlra, turn on using
> the LRA register allocator.
> (rs6000_lra_p): Likewise.
> (rs6000_hard_regno_mode_ok): Allow DI/DD/SF/SD modes in altivec
> registers if power8. If -mconstrain-regs, only allow int modes
> into LR, CTR, and special purpose registers.
> (rs6000_debug_reg_global): Print -mlra, -mconstrain-regs status if
> debugging.
> (rs6000_init_hard_regno_mode_ok): Mark that SFmode can use Altivec
> registers in the future.
> (rs6000_option_override_internal): If tuning for power8, turn on
> fusion mode by default. Turn on sign extending fusion mode if
> normal fusion mode is on, and we are at -O2 or -O3.
> (rs6000_opt_masks): Add -mlra, -mconstrain-regs.
> (fusion_gpr_load_p): New function, return true if we can fuse an
> addis instruction with a dependent load to a GPR.
> (emit_fusion_gpr_load): Emit the instructions for power8 load
> fusion to GPRs.
>
> * config/rs6000/vsx.md (VSX load fusion peepholes): Add peepholes
> to fuse together an addi instruction with a VSX load instruction.
>
> * config/rs6000/rs6000.md (GPR load fusion peepholes): Add
> peepholes to fuse an addis instruction with a load to a GPR base
> register, if the addis instruction is dead after the load, by
> using the register to be loaded for the addis. If we are
> supporting sign extending fusions, convert sign extending loads to
> zero extending loads and an explicit sign extension.
+ /* 32-bit is not done yet. */
+ if (TARGET_ELF && !TARGET_POWERPC64)
+ return 0;
What does "32-bit is not done yet." mean? This means PPC32 Linux is
not supported but PPC32 AIX is supported?
+ if (TARGET_ELF && !TARGET_POWERPC64)
+ return 0;
Please return "true" and "false" from new predicates, not "1" and "0".
+
+ case DImode:
+ if (TARGET_POWERPC64)
+ {
+ mode_name = "long";
+ load_str = "ld";
+ }
+ break;
What happens for DImode when not TARGET_POWERPC64? This should be
gcc_unreachable()?
Thanks, David