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Re: [patch, mips] Micromips delay slot fix
- From: "Maciej W. Rozycki" <macro at codesourcery dot com>
- To: Steve Ellcey <sellcey at mips dot com>
- Cc: Richard Sandiford <rdsandiford at googlemail dot com>, <gcc-patches at gcc dot gnu dot org>
- Date: Mon, 10 Jun 2013 23:13:29 +0100
- Subject: Re: [patch, mips] Micromips delay slot fix
- References: <859b5b58-e3c6-44b5-ae35-a3515fa16a00 at BAMAIL02 dot ba dot imgtec dot org>
On Mon, 10 Jun 2013, Steve Ellcey wrote:
> We found a bug in the micromips implementation where the branch delay slot
> was not getting filled for micromips. You can reproduce this with a program
> that just has an empty main function. Andrew Bennett created this fix for
> it and we would like to check it in. I am submitting it for Andrew since he
> doesn't have write access.
Your fix aside shouldn't empty main expand simply to:
jrc $ra
? There's no delay slot there.
> diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md
> index 2fdc79d..f18ab50 100644
> --- a/gcc/config/mips/mips.md
> +++ b/gcc/config/mips/mips.md
> @@ -704,7 +704,9 @@
>
> ;; Is it a single instruction?
> (define_attr "single_insn" "no,yes"
> - (symbol_ref "(get_attr_length (insn) == (TARGET_MIPS16 ? 2 : 4)
> + (symbol_ref "(((TARGET_MIPS16 || TARGET_MICROMIPS)
> + && get_attr_length (insn) == 2)
> + || (!TARGET_MIPS16 && get_attr_length (insn) == 4)
> ? SINGLE_INSN_YES : SINGLE_INSN_NO)"))
Is it safe to assume an RTL insn whose length is 4 has only a single
machine instruction in the microMIPS mode? What's the difference to the
MIPS16 instruction set here?
Maciej