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[PATCH,i386] FSGSBASE for AMD bdver3
- From: "Gopalasubramanian, Ganesh" <Ganesh dot Gopalasubramanian at amd dot com>
- To: "gcc-patches at gcc dot gnu dot org" <gcc-patches at gcc dot gnu dot org>
- Cc: "Uros Bizjak (ubizjak at gmail dot com)" <ubizjak at gmail dot com>
- Date: Mon, 13 May 2013 11:54:02 +0000
- Subject: [PATCH,i386] FSGSBASE for AMD bdver3
Hi
The patch enables FSGSBASE instruction generation for AMD bdver3 architectures.
"make -k check" passes.
Is it OK for upstream?
Regards
Ganesh
Index: gcc/ChangeLog
===================================================================
--- gcc/ChangeLog (revision 198821)
+++ gcc/ChangeLog (working copy)
@@ -1,3 +1,8 @@
+2013-05-13 Ganesh Gopalasubramanian <Ganesh.Gopalasubramanian@amd.com>
+
+ * config/i386/i386.c (processor_alias_table): Add instruction
+ FSGSBASE for AMD bdver3 architecture.
+
2013-05-13 Martin Jambor <mjambor@suse.cz>
PR middle-end/42371
Index: gcc/config/i386/i386.c
===================================================================
--- gcc/config/i386/i386.c (revision 198821)
+++ gcc/config/i386/i386.c (working copy)
@@ -3000,7 +3000,7 @@
| PTA_SSE4_2 | PTA_AES | PTA_PCLMUL | PTA_AVX
| PTA_XOP | PTA_LWP | PTA_BMI | PTA_TBM | PTA_F16C
| PTA_FMA | PTA_PRFCHW | PTA_FXSR | PTA_XSAVE
- | PTA_XSAVEOPT},
+ | PTA_XSAVEOPT | PTA_FSGSBASE},
{"btver1", PROCESSOR_BTVER1, CPU_GENERIC64,
PTA_64BIT | PTA_MMX | PTA_SSE | PTA_SSE2 | PTA_SSE3
| PTA_SSSE3 | PTA_SSE4A |PTA_ABM | PTA_CX16 | PTA_PRFCHW