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[PATCH 6/n, i386]: Add zero-extended vec_extract patterns
- From: Uros Bizjak <ubizjak at gmail dot com>
- To: "gcc-patches at gcc dot gnu dot org" <gcc-patches at gcc dot gnu dot org>
- Date: Thu, 9 May 2013 21:43:37 +0200
- Subject: [PATCH 6/n, i386]: Add zero-extended vec_extract patterns
Hello!
movd from xmm register to integer register also zero-extends the value
in integer register. Also, the patch adds a couple of missing
alternatives to *vec_extractv4si, we can "extract" the values using
128bit SSE shifts.
2013-05-09 Uros Bizjak <ubizjak@gmail.com>
* config/i386/sse.md (*vec_extractv4si_0_zext): New pattern.
(*vec_extractv4si_zext_mem): Ditto.
(*vec_extractv2di): Add 0->x and x->x alternatives.
* config/i386/mmx.md (*vec_extractv2si_zext_mem): New pattern.
* config/i386/i386.md (*zero_extendsidi2): Add *Yj->?r alternative.
Patch was tested on x86_64-pc-linux-gnu and committed to mainline SVN.
Uros.