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Re: [PATCH, AArch64] Testcases for ANDS instruction
- From: Marcus Shawcroft <marcus dot shawcroft at gmail dot com>
- To: Ian Bolton <ian dot bolton at arm dot com>
- Cc: "gcc-patches at gcc dot gnu dot org" <gcc-patches at gcc dot gnu dot org>
- Date: Tue, 7 May 2013 14:46:31 +0100
- Subject: Re: [PATCH, AArch64] Testcases for ANDS instruction
- References: <517A8061 dot 7060601 at arm dot com> <5180e584 dot a287440a dot 27da dot ffffa2e6SMTPIN_ADDED_BROKEN at mx dot google dot com>
On 1 May 2013 10:50, Ian Bolton <ian.bolton@arm.com> wrote:
> Thanks for the review. I've fixed this up in the attached patch, by
> counting the number of matches for the first rule and expecting it to
> match additional times to cover the overlap with the lsl based rule.
>
> I've also renamed the testcases in line with the suggested GCC testcase
> naming convention.
>
> OK for commit?
>
> Cheers,
> Ian
>
>
> 2013-05-01 Ian Bolton <ian.bolton@arm.com>
>
> * gcc.target/aarch64/ands_1.c: New test.
> * gcc.target/aarch64/ands_2.c: Likewise
OK
/Marcus