Hi,
The vld1<q>_* patterns in arm_neon.h did not correctly describe
their register/memory constraints. This could lead to incorrect
code generation where they were used.
This patch fixes the bug by giving the patterns the correct
register constraints.
Regression tested on aarch64-none-elf without regressions.
OK?
Thanks,
James Greenhalgh
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gcc/
2013-04-24 James Greenhalgh <james.greenhalgh@arm.com>
* config/aarch64/arm_neon.h (vld1<q>_lane*): Fix constraints.
(vld1<q>_dup_<sufp><8, 16, 32, 64>): Likewise.
(vld1<q>_<sufp><8, 16, 32, 64>): Likewise.