This is the mail archive of the gcc-patches@gcc.gnu.org mailing list for the GCC project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

Re: [patch] Fix ICE during RTL expansion at -O1


> +      if (type1 != type2 || TREE_CODE (type1) != RECORD_TYPE)
> +        goto may_overlap;
> 
> ick, can TREE_CODE (type1) != RECORD_TYPE happen as well here?
> Please add a comment similar to the Fortran ??? above.

It can happen because we stop at unions (and qualified unions) and for them we 
cannot disambiguate based on the fields.  I'll add a regular comment.

> Can you please also add at least one testcase as
> gcc.dg/tree-ssa/ssa-fre-??.c that tests the functionality of this and that
> wasn't handled before? I suppose it would be sth like
> 
> struct S { int i; int j; };
> struct U
> {
>   struct S a[10];
> } u;
> 
> u.a[n].i= i;
> u.a[n].j = j;
> return u.a[n].i;
> 
> where we miss to CSE the load from u.a[n].i.

Yes, the patch does eliminate the redundant load in .fre1:

  u.a[n_2(D)].i = i_3(D);
  u.a[n_2(D)].j = j_5(D);
  _7 = u.a[n_2(D)].i;
  return _7;

becomes:

  u.a[n_2(D)].i = i_3(D);
  u.a[n_2(D)].j = j_5(D);
  _7 = i_3(D);
  return _7;

> Otherwise the patch is ok.

Thanks.

-- 
Eric Botcazou


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]