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Re: [SPARC] Fix PR target/56890
- From: David Miller <davem at davemloft dot net>
- To: ebotcazou at adacore dot com
- Cc: gcc-patches at gcc dot gnu dot org, jakub at redhat dot com
- Date: Mon, 15 Apr 2013 13:09:48 -0400 (EDT)
- Subject: Re: [SPARC] Fix PR target/56890
- References: <3344061 dot A5Rjyamnnq at polaris> <20130414 dot 151955 dot 36832904790658210 dot davem at davemloft dot net> <2083893 dot Y5sCjFWLNn at polaris>
From: Eric Botcazou <firstname.lastname@example.org>
Date: Mon, 15 Apr 2013 18:07:05 +0200
>> We can actually support this by adding patterns for the partial store
>> instructions, which can store 8-bit and 16-bit quantities from FP
> Ah, indeed, with -mvis. Not clear whether that would really be worthwhile.
Well, %99 of sparc cpus used with gcc these days are -mvis capable,
and popping the value to the integer register file via the stack
in these situations is needless overhead.