This is the mail archive of the gcc-patches@gcc.gnu.org mailing list for the GCC project.

Index Nav:	[Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav:	[Date Prev] [Date Next]	[Thread Prev] [Thread Next]
Other format:	[Raw text]

Re: [PATCH RFC] Finer grained reg classes.

From: Jeff Law <law at redhat dot com>
To: Ian Lance Taylor <iant at google dot com>
Cc: David Miller <davem at davemloft dot net>, gcc-patches <gcc-patches at gcc dot gnu dot org>, Eric Botcazou <ebotcazou at adacore dot com>, rth at twiddle dot net
Date: Tue, 19 Mar 2013 12:31:05 -0600
Subject: Re: [PATCH RFC] Finer grained reg classes.
References: <20130319 dot 113349 dot 779301153261368350 dot davem at davemloft dot net> <CAKOQZ8z1gtyMowAu--nXkU83imQRL=M0rA3Hr4hdbONNXRE2sg at mail dot gmail dot com>

On 03/19/2013 11:58 AM, Ian Lance Taylor wrote:

On Tue, Mar 19, 2013 at 8:33 AM, David Miller <davem@davemloft.net> wrote:


So this patch tries to rework the semantics of hard register classes,
such that if a hard register is present in the set it is implied that
the rest of the registers in a multi-register group are present as
well.  So we can add a register class called EVEN_REGS and only have
to set the even register bits.


I haven't really looked at your patch, but I just want to say that I
think this is the right way to go.

Likewise. I've certainly worked on ports where this would have beenhelpful in the past.


Jeff

Follow-Ups:
- Re: [PATCH RFC] Finer grained reg classes.
  - From: Steven Bosscher

References:
- [PATCH RFC] Finer grained reg classes.
  - From: David Miller
- Re: [PATCH RFC] Finer grained reg classes.
  - From: Ian Lance Taylor

Index Nav:	[Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav:	[Date Prev] [Date Next]	[Thread Prev] [Thread Next]