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[Patch, microblaze]: Adjustments to pcmp instruction generation

From: David Holsgrove <david dot holsgrove at xilinx dot com>
To: "gcc-patches at gcc dot gnu dot org" <gcc-patches at gcc dot gnu dot org>
Cc: "Michael Eager (eager at eagercon dot com)" <eager at eagercon dot com>, John Williams <jwilliams at xilinx dot com>, "Edgar E. Iglesias (edgar dot iglesias at gmail dot com)" <edgar dot iglesias at gmail dot com>, Vinod Kathail <vinodk at xilinx dot com>, Vidhumouli Hunsigida <vidhum at xilinx dot com>, Nagaraju Mekala <nmekala at xilinx dot com>, Tom Shui <tshui at xilinx dot com>
Date: Mon, 11 Feb 2013 06:40:09 +0000
Subject: [Patch, microblaze]: Adjustments to pcmp instruction generation

Adjustments to pcmp instruction generation

avoid pcmpe insns when not valuable

For pure in and equality comparisions, xor is better,
Xor is a one cycle insn as pcmp.

Pattern insns will still be used when you need to
conditionally set something to one or zero, e.g

if (a)
  return 1;
else
  return 0;

Define contraint for first operand in insn matching
fcmp as general register

Add a constraint to the cstoresf pattern forcing the use of
general regs for the operands. This avoids an ICE where the
compiler would crash on late usage of pseudo registers.

Changelog

2013-02-11  Edgar E. Iglesias <edgar.iglesias@gmail.com>

  * config/microblaze/microblaze.c (microblaze_emit_compare):
     Use xor for EQ/NE comparisions
  * config/microblaze/microblaze.md (cstoresf4): Add constraints
     (cbranchsf4): Adjust operator to comparison_operator

Attachment: 0009-microblaze-Adjustments-to-pcmp-instruction-generatio.patch
Description: 0009-microblaze-Adjustments-to-pcmp-instruction-generatio.patch

Follow-Ups:
- Re: [Patch, microblaze]: Adjustments to pcmp instruction generation
  - From: Michael Eager

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