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Re: [Patch][AArch64] Tighten predicate for CMP pattern.
- From: Marcus Shawcroft <marcus dot shawcroft at arm dot com>
- To: tejas dot belagod at arm dot com
- Cc: gcc-patches at gcc dot gnu dot org, Michael Hope <michael dot hope at linaro dot org>, Marcin Juszkiewicz <marcin dot juszkiewicz at linaro dot org>
- Date: Wed, 26 Sep 2012 09:43:43 +0100
- Subject: Re: [Patch][AArch64] Tighten predicate for CMP pattern.
- References: <504E0323.6020100@arm.com>
On 10/09/12 16:11, Tejas Belagod wrote:
Hi,
This patch tightens the predicate for the CMP pattern. It makes it restrictive
to accept reg or zero as prescribed by the architecture.
Regression-tested on aarch64-none-elf. OK for aarch64-branch?
Thanks,
Tejas Belagod
ARM.
PS: This patch applies over vldn-vstn.txt sent out earlier.
Changelog:
2012-09-10 Tejas Belagod<tejas.belagod@arm.com>
gcc/
* config/aarch64/aarch64-simd.md (aarch64_cm<cmp><mode>): Tighten
predicate for operand 2 of the compare pattern to accept register
or zero.
* config/aarch64/predicates.md (aarch64_simd_reg_or_zero): New.
Tejas
This patch duplicated the definition of aarch64_simd_reg_or_zero
introduced by the earlier vld234 patch. I've committed the attached fix
to aarch64-branch and aarch64-4.7-branch
Cheers
/Marcus
2012-09-26 Marcus Shawcroft <marcus.shawcroft@arm.com>
* config/aarch64/predicates.md (aarch64_simd_reg_or_zero): Remove
duplicate.
Index: gcc/config/aarch64/predicates.md
===================================================================
--- gcc/config/aarch64/predicates.md (revision 191754)
+++ gcc/config/aarch64/predicates.md (working copy)
@@ -295,9 +295,3 @@
{
return aarch64_simd_imm_zero_p (op, mode);
})
-
-(define_predicate "aarch64_simd_reg_or_zero"
- (and (match_code "reg,subreg,const_int,const_vector")
- (ior (match_operand 0 "register_operand")
- (ior (match_test "op == const0_rtx")
- (match_test "aarch64_simd_imm_zero_p (op, mode)")))))