This is the mail archive of the gcc-patches@gcc.gnu.org mailing list for the GCC project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

[PATCH 1/2] m32c: Don't use set_optab_handler


Committed after a build completed.


r~


	* config/m32c/m32c.c (TARGET_INIT_LIBFUNCS): Remove.
	(m32c_init_libfuncs): Remove.
	* config/m32c/cond.md (cstore<QHPSI>4_16): Rename from cstore<QHPSI>4.
	(cstore<QHPSI>4): New expander.
 
diff --git a/gcc/config/m32c/cond.md b/gcc/config/m32c/cond.md
index c751070..5886a7d 100644
--- a/gcc/config/m32c/cond.md
+++ b/gcc/config/m32c/cond.md
@@ -152,14 +152,31 @@
 
 ;; These are the pre-split patterns for the conditional sets.
 
-(define_insn_and_split "cstore<mode>4"
+(define_expand "cstore<mode>4"
+  [(set (match_operand:QI 0 "register_operand")
+	(match_operator:QI 1 "ordered_comparison_operator"
+	 [(match_operand:QHPSI 2 "mra_operand")
+	  (match_operand:QHPSI 3 "mrai_operand")]))]
+  ""
+{
+  if (TARGET_A24)
+    {
+      rtx o = gen_reg_rtx (HImode);
+      emit_insn (gen_cstore<mode>4_24 (o, operands[1],
+				       operands[2], operands[3]));
+      emit_move_insn (operands[0], gen_lowpart (QImode, o));
+      DONE;
+    }
+})
+
+(define_insn_and_split "*cstore<mode>4_16"
   [(set (match_operand:QI 0 "register_operand" "=Rqi")
 	(match_operator:QI 1 "ordered_comparison_operator"
 	 [(match_operand:QHPSI 2 "mra_operand" "RraSd")
 	  (match_operand:QHPSI 3 "mrai_operand" "RraSdi")]))]
   "TARGET_A16"
   "#"
-  "reload_completed"
+  "&& reload_completed"
   [(set (reg:CC FLG_REGNO)
 	(compare (match_dup 2)
 		 (match_dup 3)))
@@ -176,7 +193,7 @@
 	  (match_operand:QHPSI 3 "mrai_operand" "RraSdi")]))]
   "TARGET_A24"
   "#"
-  "reload_completed"
+  "&& reload_completed"
   [(set (reg:CC FLG_REGNO)
 	(compare (match_dup 2)
 		 (match_dup 3)))
diff --git a/gcc/config/m32c/m32c.c b/gcc/config/m32c/m32c.c
index 79b03fa..878be09 100644
--- a/gcc/config/m32c/m32c.c
+++ b/gcc/config/m32c/m32c.c
@@ -1857,25 +1857,6 @@ m32c_trampoline_init (rtx m_tramp, tree fndecl, rtx chainval)
 #undef A0
 }
 
-/* Implicit Calls to Library Routines */
-
-#undef TARGET_INIT_LIBFUNCS
-#define TARGET_INIT_LIBFUNCS m32c_init_libfuncs
-static void
-m32c_init_libfuncs (void)
-{
-  /* We do this because the M32C has an HImode operand, but the
-     M16C has an 8-bit operand.  Since gcc looks at the match data
-     and not the expanded rtl, we have to reset the optab so that
-     the right modes are found. */
-  if (TARGET_A24)
-    {
-      set_optab_handler (cstore_optab, QImode, CODE_FOR_cstoreqi4_24);
-      set_optab_handler (cstore_optab, HImode, CODE_FOR_cstorehi4_24);
-      set_optab_handler (cstore_optab, PSImode, CODE_FOR_cstorepsi4_24);
-    }
-}
-
 /* Addressing Modes */
 
 /* The r8c/m32c family supports a wide range of non-orthogonal
-- 
1.7.7.6


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]