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Re: [PATCH] Intrinsics for ADCX, ADOX, RDSEED and PREFETCHW
- From: Uros Bizjak <ubizjak at gmail dot com>
- To: gcc-patches at gcc dot gnu dot org
- Cc: Michael Zolotukhin <michael dot v dot zolotukhin at gmail dot com>, Kirill Yukhin <kirill dot yukhin at gmail dot com>, "H.J. Lu" <hjl dot tools at gmail dot com>
- Date: Thu, 19 Jul 2012 11:03:25 +0200
- Subject: Re: [PATCH] Intrinsics for ADCX, ADOX, RDSEED and PREFETCHW
Hello!
> This patch adds new intrinsics for new ADCX, ADOX, RDSEED and
> PREFETCHW instructions, introduced here:
> http://software.intel.com/en-us/avx/
+/* Copyright (C) 2012 Free Software Foundation, Inc.
+ Contributed by Michael Zolotukhin.
Please remove "Contributed by" lines from headers.
+
+ /* Set CF to specified value. */
+ emit_insn (gen_addqi3_cc(
+ gen_reg_rtx(QImode),
+ op1,
+ constm1_rtx));
+
This should be in the *.md expander.
+ /* Return current CF value. */
+ emit_insn (gen_rtx_SET (QImode, target,
+ gen_rtx_LTU (QImode, gen_rtx_REG (CCCmode, FLAGS_REG), const0_rtx)));
Also this.
+(define_attr "isa"
"base,sse2,sse2_noavx,sse3,sse4,sse4_noavx,noavx,avx,avx2,noavx2,bmi2,rdseed,adx,prfchw"
No need to add unused isa attributes.
+ (eq_attr "isa" "rdseed") (symbol_ref "TARGET_RDSEED")
+ (eq_attr "isa" "adx") (symbol_ref "TARGET_ADX")
+ (eq_attr "isa" "prfchw") (symbol_ref "TARGET_PRFCHW")
This is not needed.
+(define_insn "adcx<mode>"
+ [
+ (set (match_operand:SWI48 0 "register_operand" "=r")
+ (unspec:SWI48
+ [(match_operand:SWI48 1 "nonimmediate_operand" "%0")
+ (match_operand:SWI48 2 "nonimmediate_operand" "rme")
+ (reg:CC FLAGS_REG)
+ ]UNSPEC_ADCX))
+ (clobber (reg:CC FLAGS_REG))]
+ "TARGET_ADX"
+ "adcx\t{%2, %0|%0, %2}"
+ [(set_attr "mode" "<MODE>")])
Do we really need unspec? It is a specialized version of a PLUS RTX,
please see *<plusminus_insns><mode>3_carry.
(define_insn "*prefetch_3dnow_<mode>"
[(prefetch (match_operand:P 0 "address_operand" "p")
- (match_operand:SI 1 "const_int_operand" "n")
+ (const_int 0)
(const_int 3))]
"TARGET_3DNOW"
-{
- if (INTVAL (operands[1]) == 0)
- return "prefetch\t%a0";
- else
- return "prefetchw\t%a0";
-}
+ "prefetch\t%a0"
You have a mnemonic clash here. prefetchw is not good name for a new
instruction, it clashes with existing 3dnow name. Intel will need to
fix the spec, you probably won't be able to change prefetchw encoding
in binutils.
Please also add new compile flags to
gcc.target/i386/sse-{12,13,14,22,23}.c and g++.dg/other/i386-{2,3}.C.
BTW: Where are ADOX intrinsics?
Uros.