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Re: [committed] Add SET rtx costs for MIPS / [SH] PR 53250
- From: Oleg Endo <oleg dot endo at t-online dot de>
- To: Richard Sandiford <rdsandiford at googlemail dot com>
- Cc: gcc-patches at gcc dot gnu dot org, kkojima <kkojima at gcc dot gnu dot org>
- Date: Sun, 06 May 2012 21:57:16 +0200
- Subject: Re: [committed] Add SET rtx costs for MIPS / [SH] PR 53250
- References: <87ipg9dswq.fsf@talisman.home>
On Sun, 2012-05-06 at 20:13 +0100, Richard Sandiford wrote:
> This patch adds SET rtx costs to MIPS. Since "FPR modes" and "GPR modes"
> aren't tieable, the effect is to restore the original lower-subreg behaviour
> of splitting all multiword modes.
>
> Tested by setting LOG_COSTS to 1 and checking that the costs looked sensible.
> Also tested by compiling cc1 .ii files for -mabi=n32, -mabi=64, -mabi=32
> and -mabi=32 -mfp64. The output was the same as when FORCE_LOWERING was
> set to 1, but different from unmodified trunk. Applied.
>
The attached patch does pretty much the same for the SH target.
Tested also by setting LOG_COSTS to 1 and checking that multi-word modes
are marked for splitting (except for DImode zero_extend lowering).
Also verified that newlib compiles again.
OK?
Cheers,
Oleg
ChangLog:
PR target/53250
* config/sh/sh.c (sh_rtx_costs): Handle SET case to restore
original behavior of lower-subreg.
Index: gcc/config/sh/sh.c
===================================================================
--- gcc/config/sh/sh.c (revision 187212)
+++ gcc/config/sh/sh.c (working copy)
@@ -2999,6 +2999,27 @@
{
switch (code)
{
+ /* The lower-subreg pass decides whether to split multi-word regs
+ into individual regs by looking at the cost for a REG of certain
+ modes with the following patterns:
+ (set (reg) (reg))
+ (set (reg) (const_int 0))
+ On machines that support vector move operations a multi-word move
+ is the same cost as individual reg move. On SH there is no
+ vector-move, so we have to provide the correct cost in the number
+ of move insns to load/store the reg of the mode in question. */
+ case SET:
+ if (register_operand (SET_DEST (x), VOIDmode)
+ && (register_operand (SET_SRC (x), VOIDmode)
+ || satisfies_constraint_Z (SET_SRC (x))))
+ {
+ const enum machine_mode mode = GET_MODE (SET_DEST (x));
+ *total = COSTS_N_INSNS (GET_MODE_SIZE (mode)
+ / mov_insn_size (mode, TARGET_SH2A));
+ return true;
+ }
+ return false;
+
case CONST_INT:
if (TARGET_SHMEDIA)
{