This is the mail archive of the
gcc-patches@gcc.gnu.org
mailing list for the GCC project.
Re: [PATCH][ARM] NEON DImode not
- From: Andrew Stubbs <ams at codesourcery dot com>
- To: Richard Earnshaw <rearnsha at arm dot com>
- Cc: "gcc-patches at gcc dot gnu dot org" <gcc-patches at gcc dot gnu dot org>, "patches at linaro dot org" <patches at linaro dot org>
- Date: Thu, 8 Mar 2012 16:19:11 +0000
- Subject: Re: [PATCH][ARM] NEON DImode not
- References: <4F4E3AA5.1070804@codesourcery.com> <4F4E67B3.8050002@arm.com> <4F4F7226.6070809@codesourcery.com> <4F4FACC2.2050508@arm.com>
On 01/03/12 17:07, Richard Earnshaw wrote:
The RTL part of one_cmpldi2_internal and one_cmpldi2_neon are the same.
Given that we now have controls to determine when an alternative is
enabled it's generally better to have just one pattern here and turn on
the alternatives that are suitable rather than having multiple patterns.
You're already half doing this with the nota8 and onlya8 controls.
Ok, this patch unifies the two and emits the NEON instructions directly
from the arm.md pattern. I was under the impression that it is desirable
to keep the neon stuff in neon.md as far as possible.
OK?
Andrew
P.S. The insn_enabled code is not ideal, but the 'arch' attribute that
might normally deal with this is already in use. Alternative ways might
be to have a variation on the 'w' constraint ('W'?) that is conditional
on TARGET_NEON, or to have compound arch values (e.g. "onlya8_neon")?
2012-03-08 Andrew Stubbs <ams@codesourcery.com>
gcc/
* config/arm/arm.md (one_cmpldi2): Add NEON support.
---
gcc/config/arm/arm.md | 26 ++++++++++++++++++++------
1 files changed, 20 insertions(+), 6 deletions(-)
diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md
index 751997f..27a0f81 100644
--- a/gcc/config/arm/arm.md
+++ b/gcc/config/arm/arm.md
@@ -4207,11 +4207,16 @@
"")
(define_insn_and_split "one_cmpldi2"
- [(set (match_operand:DI 0 "s_register_operand" "=&r,&r")
- (not:DI (match_operand:DI 1 "s_register_operand" "0,r")))]
+ [(set (match_operand:DI 0 "s_register_operand" "=w,&r,&r,?w")
+ (not:DI (match_operand:DI 1 "s_register_operand" " w, 0, r, w")))]
"TARGET_32BIT"
- "#"
- "TARGET_32BIT && reload_completed"
+ "@
+ vmvn\t%P0, %P1
+ #
+ #
+ vmvn\t%P0, %P1"
+ "TARGET_32BIT && reload_completed
+ && arm_general_register_operand (operands[0], DImode)"
[(set (match_dup 0) (not:SI (match_dup 1)))
(set (match_dup 2) (not:SI (match_dup 3)))]
"
@@ -4221,8 +4226,17 @@
operands[3] = gen_highpart (SImode, operands[1]);
operands[1] = gen_lowpart (SImode, operands[1]);
}"
- [(set_attr "length" "8")
- (set_attr "predicable" "yes")]
+ [(set_attr "length" "*,8,8,*")
+ (set_attr "predicable" "yes")
+ (set_attr "neon_type" "neon_int_1,*,*,neon_int_1")
+ (set_attr "arch" "nota8,*,*,onlya8")
+ (set_attr_alternative "insn_enabled"
+ [(if_then_else (match_test "TARGET_NEON")
+ (const_string "yes") (const_string "no"))
+ (const_string "yes")
+ (const_string "yes")
+ (if_then_else (match_test "TARGET_NEON")
+ (const_string "yes") (const_string "no"))])]
)
(define_expand "one_cmplsi2"