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[PATCH 2/2] mips: Add R4700 scheduling support


The R4700 is identical to the R4600 except for the integer and
floating-point multiplication costs.

See page 4 of http://datasheets.chipdb.org/IDT/MIPS/79RV4700.pdf

2012-02-24  Matt Turner  <mattst88@gmail.com>

	* config/mips/4600.md (r4700_imul_si): New.
	(r4700_imul_di): New.
	(r4700_fmul_single): New.
	(r4700_fmul_double): New.
	* config/mips/driver-native.c (cpu_types): Add r4700.
	* config/mips/mips-cpus.def: Likewise.
	* config/mips/mips.c: Likewise.
	* config/mips/mips.md: Likewise.
---
 gcc/config/mips/4600.md         |   51 ++++++++++++++++++++++++++++++--------
 gcc/config/mips/driver-native.c |    2 +-
 gcc/config/mips/mips-cpus.def   |    1 +
 gcc/config/mips/mips.c          |    3 ++
 gcc/config/mips/mips.md         |    1 +
 5 files changed, 46 insertions(+), 12 deletions(-)

diff --git a/gcc/config/mips/4600.md b/gcc/config/mips/4600.md
index fcdbf00..ef74fd3 100644
--- a/gcc/config/mips/4600.md
+++ b/gcc/config/mips/4600.md
@@ -1,4 +1,4 @@
-;; R4600 and R4650 pipeline description.
+;; R4600, R4650, and R4700 pipeline description.
 ;;   Copyright (C) 2004, 2005, 2007, 2012 Free Software Foundation, Inc.
 ;;
 ;; This file is part of GCC.
@@ -21,8 +21,10 @@
 ;; This file overrides parts of generic.md.  It is derived from the
 ;; old define_function_unit description.
 ;;
-;; We handle the R4600 and R4650 in much the same way.  The only difference
-;; is in the integer multiplication and division costs.
+;; We handle the R4600, R4650, and R4700 in much the same way.  The only
+;; differences between R4600 and R4650 are the integer multiplication and
+;; division costs. The only differences between R4600 and R4700 are the
+;; integer and floating-point multiplication costs.
 
 (define_insn_reservation "r4600_imul_si" 10
   (and (eq_attr "cpu" "r4600")
@@ -37,13 +39,13 @@
   "imuldiv*12")
 
 (define_insn_reservation "r4600_idiv_si" 42
-  (and (eq_attr "cpu" "r4600")
+  (and (eq_attr "cpu" "r4600,r4700")
        (eq_attr "type" "idiv")
        (eq_attr "mode" "SI"))
   "imuldiv*42")
 
 (define_insn_reservation "r4600_idiv_di" 74
-  (and (eq_attr "cpu" "r4600")
+  (and (eq_attr "cpu" "r4600,r4700")
        (eq_attr "type" "idiv")
        (eq_attr "mode" "DI"))
   "imuldiv*74")
@@ -60,13 +62,26 @@
   "imuldiv*36")
 
 
+(define_insn_reservation "r4700_imul_si" 8
+  (and (eq_attr "cpu" "r4700")
+       (eq_attr "type" "imul,imul3,imadd")
+       (eq_attr "mode" "SI"))
+  "imuldiv*8")
+
+(define_insn_reservation "r4700_imul_di" 10
+  (and (eq_attr "cpu" "r4700")
+       (eq_attr "type" "imul,imul3,imadd")
+       (eq_attr "mode" "DI"))
+  "imuldiv*10")
+
+
 (define_insn_reservation "r4600_load" 2
-  (and (eq_attr "cpu" "r4600,r4650")
+  (and (eq_attr "cpu" "r4600,r4650,r4700")
        (eq_attr "type" "load,fpload,fpidxload"))
   "alu")
 
 (define_insn_reservation "r4600_fmove" 1
-  (and (eq_attr "cpu" "r4600,r4650")
+  (and (eq_attr "cpu" "r4600,r4650,r4700")
        (eq_attr "type" "fabs,fneg,fmove"))
   "alu")
 
@@ -76,26 +91,40 @@
 	    (eq_attr "mode" "SF")))
   "alu")
 
+
+(define_insn_reservation "r4700_fmul_single" 4
+  (and (eq_attr "cpu" "r4700")
+       (and (eq_attr "type" "fmul,fmadd")
+	    (eq_attr "mode" "SF")))
+  "alu")
+
+(define_insn_reservation "r4700_fmul_double" 5
+  (and (eq_attr "cpu" "r4700")
+       (and (eq_attr "type" "fmul,fmadd")
+	    (eq_attr "mode" "DF")))
+  "alu")
+
+
 (define_insn_reservation "r4600_fdiv_single" 32
-  (and (eq_attr "cpu" "r4600,r4650")
+  (and (eq_attr "cpu" "r4600,r4650,r4700")
        (and (eq_attr "type" "fdiv,frdiv")
 	    (eq_attr "mode" "SF")))
   "alu")
 
 (define_insn_reservation "r4600_fdiv_double" 61
-  (and (eq_attr "cpu" "r4600,r4650")
+  (and (eq_attr "cpu" "r4600,r4650,r4700")
        (and (eq_attr "type" "fdiv,frdiv")
 	    (eq_attr "mode" "DF")))
   "alu")
 
 (define_insn_reservation "r4600_fsqrt_single" 31
-  (and (eq_attr "cpu" "r4600,r4650")
+  (and (eq_attr "cpu" "r4600,r4650,r4700")
        (and (eq_attr "type" "fsqrt,frsqrt")
 	    (eq_attr "mode" "SF")))
   "alu")
 
 (define_insn_reservation "r4600_fsqrt_double" 60
-  (and (eq_attr "cpu" "r4600,r4650")
+  (and (eq_attr "cpu" "r4600,r4650,r4700")
        (and (eq_attr "type" "fsqrt,frsqrt")
 	    (eq_attr "mode" "DF")))
   "alu")
diff --git a/gcc/config/mips/driver-native.c b/gcc/config/mips/driver-native.c
index f565c57..580bca2 100644
--- a/gcc/config/mips/driver-native.c
+++ b/gcc/config/mips/driver-native.c
@@ -45,7 +45,7 @@ static const struct cpu_types {
   { C0_IMP_R14000, "r14000" },
   { C0_IMP_R8000,  "r8000" },
   { C0_IMP_R4600,  "r4600" },
-  { C0_IMP_R4700,  "r4600" },
+  { C0_IMP_R4700,  "r4700" },
   { C0_IMP_R4650,  "r4650" },
   { C0_IMP_R5000,  "vr5000" },
   { C0_IMP_RM7000, "rm7000" },
diff --git a/gcc/config/mips/mips-cpus.def b/gcc/config/mips/mips-cpus.def
index 98b915a..d4631b0 100644
--- a/gcc/config/mips/mips-cpus.def
+++ b/gcc/config/mips/mips-cpus.def
@@ -70,6 +70,7 @@ MIPS_CPU ("r4400", PROCESSOR_R4000, 3, 0)
 MIPS_CPU ("r4600", PROCESSOR_R4600, 3, 0)
 MIPS_CPU ("orion", PROCESSOR_R4600, 3, 0)
 MIPS_CPU ("r4650", PROCESSOR_R4650, 3, 0)
+MIPS_CPU ("r4700", PROCESSOR_R4700, 3, 0)
 /* ST Loongson 2E/2F processors.  */
 MIPS_CPU ("loongson2e", PROCESSOR_LOONGSON_2E, 3, PTF_AVOID_BRANCHLIKELY)
 MIPS_CPU ("loongson2f", PROCESSOR_LOONGSON_2F, 3, PTF_AVOID_BRANCHLIKELY)
diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c
index 56863fa..4bef60e 100644
--- a/gcc/config/mips/mips.c
+++ b/gcc/config/mips/mips.c
@@ -962,6 +962,9 @@ static const struct mips_rtx_cost_data
   { /* R4650 */
     DEFAULT_COSTS
   },
+  { /* R4700 */
+    DEFAULT_COSTS
+  },
   { /* R5000 */
     COSTS_N_INSNS (6),            /* fp_add */
     COSTS_N_INSNS (4),            /* fp_mult_sf */
diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md
index e5d716d..cb4d98d 100644
--- a/gcc/config/mips/mips.md
+++ b/gcc/config/mips/mips.md
@@ -54,6 +54,7 @@
   r4300
   r4600
   r4650
+  r4700
   r5000
   r5400
   r5500
-- 
1.7.3.4


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