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Re: [PATCH, i386] RTM support
On Mon, Feb 20, 2012 at 7:57 PM, Richard Henderson <rth@redhat.com> wrote:
>>>> tempRIP = RIP + SignExtend (IMM),
>>>>
>>>> where RIP is instruction following XBEGIN instruction.
>>>
>>> So? ?.+N is generic assembler syntax, not specifying IMM=6.
>>> With "xbegin .+6" the assembler will of course encode IMM=0,
>>> because it knows that the xbegin insn is 6 bytes.
>>
>> Is the "fallback code" the insn just after the xbegin insn?
>
> Yes.
>
> If you write everything in pure assembly (or if the compiler gets
> really smart) then you can use the branch-like semantics and
> arrange for the fallback code to be completely out of line.
>
> Otherwise we ignore the branch-like feature and rely entirely on
> the data characteristics of the insn, in that %rax is modified.
> Thus the initial set of -1 and subsequent compare vs the same.
I see the logic now, somehow I have assumed the "really smart" way ;)
Other than that, testing of new headers should be added to
gcc.target/i386/sse-[12,13,14].c and g++.dg/other/i386-[2,3].c.
Thanks,
Uros.
- References:
- [PATCH, i386] RTM support
- Re: [PATCH, i386] RTM support
- Re: [PATCH, i386] RTM support
- Re: [PATCH, i386] RTM support
- Re: [PATCH, i386] RTM support
- Re: [PATCH, i386] RTM support
- Re: [PATCH, i386] RTM support
- Re: [PATCH, i386] RTM support
- Re: [PATCH, i386] RTM support
- Re: [PATCH, i386] RTM support
- Re: [PATCH, i386] RTM support