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PR middle-end/51472: handle TM memmove with non-addressable destinations


I fixed this PR, and then it got reopened because the testcase triggered a different problem on Alpha, Mips, and other architectures. The problem is actually totally different than the previous fix for 51472, and has nothing to do with --param tm-max-aggregate-size.

This problem here is that a load is transformed into a transactional memmove in such a way that the subsequent SSA uses are pointing to the wrong thing. For example, originally we have:

    global_var_ssa_999 = global_var;
    *p = global_var_ssa_999;

Through expand_assign_tm -> gimplify_addr -> force_gimple_operand_gsi, the above gets transformed into this:

    D.1234 = global_var_ssa_999; <-- BOO HISS! Uninitialized.
    __builtin__ITM_memmoveRtWt (&D.1234, &global_var, 16);
    *p = global_var_ssa_999; <-- Wuuuut?

We should either propagate D.1234 to the uses of global_var_ssa_999, or copy D.1234 into global_var_ssa_999 and happily proceed.
Option B is pretty straightforward, and with the attached patch we end up with:


__builtin__ITM_memmoveRtWt (&D.1234, &global_var, 16);
    global_var_ssa_999 = D.1234;

The attached patch fixes the ICE on alpha-linux-gnu as tested with a cross-cc1 build. Fully bootregtested on x86-64 Linux.

OK?

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