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[PATCH 08/10] mips: Add sdot_prodv4hi for Loongson.


---
 gcc/config/mips/loongson.md |   25 +++++++++++++++++++------
 1 files changed, 19 insertions(+), 6 deletions(-)

diff --git a/gcc/config/mips/loongson.md b/gcc/config/mips/loongson.md
index 8743984..e9fa616 100644
--- a/gcc/config/mips/loongson.md
+++ b/gcc/config/mips/loongson.md
@@ -381,15 +381,28 @@
 })
 
 ;; Multiply and add packed integers.
-(define_insn "loongson_pmadd<V_stretch_half_suffix>"
-  [(set (match_operand:<V_stretch_half> 0 "register_operand" "=f")
-        (unspec:<V_stretch_half> [(match_operand:VH 1 "register_operand" "f")
-				  (match_operand:VH 2 "register_operand" "f")]
-				 UNSPEC_LOONGSON_PMADD))]
+(define_insn "loongson_pmaddhw"
+  [(set (match_operand:V2SI 0 "register_operand" "=f")
+        (unspec:V2SI [(match_operand:V4HI 1 "register_operand" "f")
+		      (match_operand:V4HI 2 "register_operand" "f")]
+		     UNSPEC_LOONGSON_PMADD))]
   "TARGET_HARD_FLOAT && TARGET_LOONGSON_VECTORS"
-  "pmadd<V_stretch_half_suffix>\t%0,%1,%2"
+  "pmaddhw\t%0,%1,%2"
   [(set_attr "type" "fmul")])
 
+(define_expand "sdot_prodv4hi"
+  [(match_operand:V2SI 0 "register_operand" "")
+   (match_operand:V4HI 1 "register_operand" "")
+   (match_operand:V4HI 2 "register_operand" "")
+   (match_operand:V2SI 3 "register_operand" "")]
+  "TARGET_HARD_FLOAT && TARGET_LOONGSON_VECTORS"
+{
+  rtx t = gen_reg_rtx (V2SImode);
+  emit_insn (gen_loongson_pmaddhw (t, operands[1], operands[2]));
+  emit_insn (gen_addv2si3 (operands[0], t, operands[3]));
+  DONE;
+})
+
 ;; Maximum of signed halfwords.
 (define_insn "smax<mode>3"
   [(set (match_operand:VH 0 "register_operand" "=f")
-- 
1.7.7.4


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