This is the mail archive of the
gcc-patches@gcc.gnu.org
mailing list for the GCC project.
Re: [Patch.AVR,4.6] Fix PR51002
- From: Georg-Johann Lay <avr at gjlay dot de>
- To: Joerg Wunsch <joerg_wunsch at uriah dot heep dot sax dot de>
- Cc: gcc-patches at gcc dot gnu dot org, Denis Chertykov <chertykov at gmail dot com>, Wim Lewis <wiml at hhhh dot org>, Eric Weddington <eric dot weddington at atmel dot com>
- Date: Wed, 30 Nov 2011 12:54:27 +0100
- Subject: Re: [Patch.AVR,4.6] Fix PR51002
- References: <4ED4BEDE.4000600@gjlay.de> <4ED60609.6050807@gjlay.de> <20111130105023.GX23138@uriah.heep.sax.de>
Joerg Wunsch wrote:
> As Georg-Johann Lay wrote:
>
>> There is ATtiny4313 (and maybe others) that have 8-bit SP and 0x100 RAM.
>> As RAM starts at 0x60, I wonder what the meaning of SP is?
>
> I think this is simply a bug in the datasheet. The device description
> XML file of the ATtiny4313 mentions an SPH register, and it would not
> make any much sense without it.
Then avr-mcus.def adopted this bug from the manual for ATtiny4313 at least:
AVR_MCU ("attiny4313", ARCH_AVR25, "__AVR_ATtiny4313__", 1 /* short_sp, should
be 0 ? */, 0, 0x0060, "tn4313")
Johann