Re: Use of vector instructions in memmov/memset expanding

[Michael Zolotukhin <michael dot v dot zolotukhin at gmail dot com>]

And, finally, part with the tests.

On 20 October 2011 12:36, Michael Zolotukhin
<michael.v.zolotukhin@gmail.com> wrote:
> Back-end part of the patch is attached here.
>
> On 20 October 2011 12:35, Michael Zolotukhin
> <michael.v.zolotukhin@gmail.com> wrote:
>> Middle-end part of the patch is attached.
>>
>> On 20 October 2011 12:34, Michael Zolotukhin
>> <michael.v.zolotukhin@gmail.com> wrote:
>>> I fixed the tests as well as updated my branch and fixed introduced
>>> during this process bugs.
>>> Here is fixed complete patch (other parts will be sent in consequent letters).
>>>
>>> The changes passed bootstrap and make check.
>>>
>>> On 29 September 2011 15:21, Jakub Jelinek <jakub@redhat.com> wrote:
>>>> Hi!
>>>>
>>>> On Thu, Sep 29, 2011 at 03:14:40PM +0400, Michael Zolotukhin wrote:
>>>> +/* { dg-options "-O2 -march=atom -mtune=atom -m64 -dp" } */
>>>>
>>>> The testcases are wrong, -m64 or -m32 should never appear in dg-options,
>>>> instead if the testcase is specific to -m64, it should be guarded with
>>>> /* { dg-do compile { target lp64 } } */
>>>> resp. ia32 (or ilp32, depending on what exactly should be done for -mx32),
>>>> if you have the same testcase for -m32 and -m64, but just want different
>>>> scan-assembler for the two cases, then just guard the scan-assembler
>>>> with lp64 resp. ia32/ilp32 target and add second one for the other target.
>>>>
>>>> ? ? ? ?Jakub
>>>
>>> --
>>> ---
>>> Best regards,
>>> Michael V. Zolotukhin,
>>> Software Engineer
>>> Intel Corporation.
>>>
>>
>>
>>
>> --
>> ---
>> Best regards,
>> Michael V. Zolotukhin,
>> Software Engineer
>> Intel Corporation.
>>
>
>
>
> --
> ---
> Best regards,
> Michael V. Zolotukhin,
> Software Engineer
> Intel Corporation.
>



-- 
---
Best regards,
Michael V. Zolotukhin,
Software Engineer
Intel Corporation.

Attachment: memfunc-tests-3.patch
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