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The generic support for vector permutation will allow for automatic lowering to V*QImode, so all we need to add to support for these targets is the single V16QI pattern that represents the base permutation insn. I'm not touching any of the other ways that the permutation insn could be generated. After the generic support is added, I'll leave it to the port maintainers to determine what they want to keep. I suspect in many cases using the generic __builtin_shuffle plus some casting in the target-specific header files would be sufficient, eliminating several dozen builtins. Ok? r~ * config/rs6000/altivec.md (vec_permv16qi): New. * config/spu/spu.md (vec_permv16qi): New.
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