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[rs6000, spu] Add vec_perm named pattern

From: Richard Henderson <rth at redhat dot com>
To: dje dot gcc at gmail dot com, uweigand at de dot ibm dot com
Cc: GCC Patches <gcc-patches at gcc dot gnu dot org>
Date: Wed, 12 Oct 2011 15:42:12 -0700
Subject: [rs6000, spu] Add vec_perm named pattern

The generic support for vector permutation will allow for automatic
lowering to V*QImode, so all we need to add to support for these targets
is the single V16QI pattern that represents the base permutation insn.

I'm not touching any of the other ways that the permutation insn 
could be generated.  After the generic support is added, I'll leave
it to the port maintainers to determine what they want to keep.  I
suspect in many cases using the generic __builtin_shuffle plus some
casting in the target-specific header files would be sufficient,
eliminating several dozen builtins.


Ok?


r~


	* config/rs6000/altivec.md (vec_permv16qi): New.

	* config/spu/spu.md (vec_permv16qi): New.

Attachment: d-ppc-vec-perm
Description: Text document

Attachment: d-spu-vec-perm
Description: Text document

Follow-Ups:
- Re: [rs6000, spu] Add vec_perm named pattern
  - From: Michael Meissner
- [commit, spu] Fix vec_perm pattern (Re: [rs6000, spu] Add vec_perm named pattern)
  - From: Ulrich Weigand

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