This is the mail archive of the
gcc-patches@gcc.gnu.org
mailing list for the GCC project.
[patch i386]: Unbreak bootstrap for x64 SEH enabled target
- From: Kai Tietz <ktietz70 at googlemail dot com>
- To: GCC Patches <gcc-patches at gcc dot gnu dot org>
- Cc: Richard Henderson <rth at redhat dot com>
- Date: Wed, 12 Oct 2011 09:07:24 +0200
- Subject: [patch i386]: Unbreak bootstrap for x64 SEH enabled target
Hello,
by recent changes gcc begun to move code into the prologue region.
This is for x64 SEH an issue, as here the table-information for
prologue is limited to 255 bytes size. So we need to avoid moving
additional code into prologue. To achieve this we mark all standard
and xmm registers as prologue-used at the end of prologue. Also we
need to emit a memory blockage.
ChangeLog
2011-10-12 Kai Tietz <ktietz@redhat.com>
* config/i386/i386.c (ix86_expand_prologue): Mark
for TARGET_SEH all sse/integer registers as prologue-used.
Tested for x86_64-w64-mingw32. Ok for apply?
Regards,
Kai
Index: i386.c
===================================================================
--- i386.c (revision 179824)
+++ i386.c (working copy)
@@ -10356,7 +10356,24 @@
Further, prevent alloca modifications to the stack pointer from being
combined with prologue modifications. */
if (TARGET_SEH)
- emit_insn (gen_prologue_use (stack_pointer_rtx));
+ {
+ int i;
+
+ /* Due limited size of prologue-code size of 255 bytes,
+ we need to prevent scheduler to sink instructions into
+ prologue code. Therefore we mark all standard, sse, fpu,
+ and the pc registers as prologue-used to prevent this.
+ Also an memory-blockage is necessary. */
+ emit_insn (gen_memory_blockage ());
+
+ for (i = 0; i <= 7; i++)
+ {
+ emit_insn (gen_prologue_use (gen_rtx_REG (Pmode, AX_REG + i)));
+ emit_insn (gen_prologue_use (gen_rtx_REG (Pmode, R8_REG + i)));
+ emit_insn (gen_prologue_use (gen_rtx_REG (TImode, XMM0_REG + i)));
+ emit_insn (gen_prologue_use (gen_rtx_REG (TImode, XMM8_REG + i)));
+ }
+ }
}
/* Emit code to restore REG using a POP insn. */