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Re: [0/4] Modulo scheduling with haifa-sched for C6X
- From: Richard Sandiford <richard dot sandiford at linaro dot org>
- To: Bernd Schmidt <bernds at codesourcery dot com>
- Cc: GCC Patches <gcc-patches at gcc dot gnu dot org>
- Date: Mon, 03 Oct 2011 09:23:19 +0100
- Subject: Re: [0/4] Modulo scheduling with haifa-sched for C6X
- References: <4E6FCFE3.5010807@codesourcery.com> <g4vcsvijhj.fsf@richards-thinkpad.stglab.manchester.uk.ibm.com> <4E707B58.1070705@codesourcery.com>
Bernd Schmidt <bernds@codesourcery.com> writes:
> On 09/14/11 11:03, Richard Sandiford wrote:
>> ...I didn't see from an admittedly quick read of the patch how you
>> handle memory disambiguation between iterations. If a loop includes:
>>
>> lb $3,($4)
>> sb $5,1($4)
>>
>> then the two instructions can be reordered by normal ebb scheduling,
>> but the inter-iteration conflict is important for modulo scheduling.
>
> There's nothing special to handle, I think. sched-deps should see that
> the ld in iteration 1 is DEP_ANTI against the sb in iteration 0
> (assuming there's also an increment).
For the record, I don't agree that we should rely on register
dependencies to handle memory dependencies. It's possible for MEMs in
different iterations to alias without there being a register dependence
between them. It might not happen often in modulo-schedulable loops,
but it is possible...
I realise the patch has been approved though. Like I say,
it's just for the record.
Richard