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Re: PATCH [7/n] X32: Handle address output and calls patterns


On Wed, Jul 20, 2011 at 9:53 AM, Uros Bizjak <ubizjak@gmail.com> wrote:

>>>>> since Pmode is used in non-PIC tablejump, we have to put 64bit value for
>>>>> labels with 0 upper 32bits in tablejump for x32.
>>>>
>>>> The mode is completely controled by CASE_VECTOR_MODE.
>>>>
>>>
>>> Here is the updated patch. ?OK for trunk?
>>>
>>
>> A small change. ?It always use 64bit register for indirect branch.
>
> - ? ? ? ? ix86_print_operand (file, x, 0);
> + ? ? ? ? /* Always use 64bit register for indirect branch. ?*/
> + ? ? ? ? ix86_print_operand (file, x,
> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? REG_P (x) && TARGET_64BIT ? 'q' : 0);
> ? ? ? ? ?return;
>
> /* Always use 64bit register for indirect branch. ?*/
> if (REG_P (x) && TARGET_64BIT)
> ?print_reg (x, 'q', file);
> else
> ?ix86_print_operand (file, x, 0);
>
> ?(define_insn "*indirect_jump"
> - ?[(set (pc) (match_operand:P 0 "nonimmediate_operand" "rm"))]
> + ?[(set (pc) (match_operand:P 0 "x32_indirect_branch_operand" "rm"))]
>
> Just name it "indirect_branch_operand".
>
> ?(define_insn_and_split "*call_vzeroupper"
> - ?[(call (mem:QI (match_operand:P 0 "call_insn_operand" "<c>zm"))
> + ?[(call (mem:QI (match_operand:P 0 "x32_call_insn_operand" "<c>zm"))
>
> Don't introduce new predicate, change call_insn_operand instead to
> conditionally disable memory_operand on x32. You will need to change
> "<c>zm" register constraint to "<c>z" on x32, otherwise you will get
> ICEs.

Use new constraint here, something like (untested):

Index: constraints.md
===================================================================
--- constraints.md	(revision 176494)
+++ constraints.md	(working copy)
@@ -127,6 +127,11 @@
   "@internal Constant call address operand."
   (match_operand 0 "constant_call_address_operand"))

+(define_constraint "w"
+  "@internal Call memory operand."
+  (and (match_test "!TARGET_X32")
+       (match_operand 0 "memory_operand"))
+
 ;; Integer constant constraints.
 (define_constraint "I"
   "Integer constant in the range 0 @dots{} 31, for 32-bit shifts."

Uros.


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