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Re: [Path,AVR]: Improve loading of 32-bit constants
- From: Denis Chertykov <chertykov at gmail dot com>
- To: Georg-Johann Lay <avr at gjlay dot de>
- Cc: gcc-patches at gcc dot gnu dot org, Eric Weddington <eric dot weddington at atmel dot com>, Anatoly Sokolov <aesok at post dot ru>
- Date: Wed, 6 Jul 2011 17:49:14 +0400
- Subject: Re: [Path,AVR]: Improve loading of 32-bit constants
- References: <4E144C61.60600@gjlay.de>
2011/7/6 Georg-Johann Lay <avr@gjlay.de>:
> For loading a 32-bit constant in a register, there is room for
> improvement:
>
> * SF can be handled the same way as SI and therefore the patch
> Âadds a peep2 to produce a *reload_insf analogon to *reload_insi.
>
> * If the destination register overlaps NO_LD_REGS, values already
> Âloaded into some other byte can be reused by a simple MOV.
> ÂThis is helpful then moving values like, e.g. -2, -100 etc. because
> Âall high bytes are 0xff.
>
> * 0.0f can be directly moved to memory.
>
> * The mov insns contain "!d" constraint. I see no reason to make "d"
> Âexpensive and discourage use of d-regs. ÂA "*d" to hide is better
> Âbecause it does it neither puts additional pressure on "d" nor
> Âdiscourages "d".
>
I would like to have a real code examples.
Denis.