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Re: [RFC] Fix full memory barrier on SPARC-V8
- From: Geert Bosch <bosch at adacore dot com>
- To: David Miller <davem at davemloft dot net>
- Cc: "ebotcazou at adacore dot com" <ebotcazou at adacore dot com>, "gcc-patches at gcc dot gnu dot org" <gcc-patches at gcc dot gnu dot org>, "jakub at redhat dot com" <jakub at redhat dot com>
- Date: Mon, 27 Jun 2011 19:36:06 -0400
- Subject: Re: [RFC] Fix full memory barrier on SPARC-V8
- References: <201106271811.10889.ebotcazou@adacore.com> <20110627.160015.478778408553006939.davem@davemloft.net>
On Jun 27, 2011, at 19:00, David Miller <davem@davemloft.net> wrote:
> V8 can only reorder stores, that's why it only has a 'stbar'
> instruction. I'm not so sure I agree with trying to paper over the
> fact that someone has compiled code for v8 that's going to run on a v9
> cpu.
That's not the issue. While it is true that all stores will be submitted in order , this does not guarantee store-load consistency. In particular on a multiprocessor, each individual processor has it's own store buffers and cannot see what is in the other CPUs store buffet. In the end all stores will be committed to memory in a sequential order, but that is not sufficient. The use of a load-store instruction is needed to achieve a full barrier. The SPARC architecture manuals describe this in detail.
-Geert