Re: PATCH: PR target/49142: Invalid 8bit register operand

[Uros Bizjak <ubizjak at gmail dot com>]

On Wed, May 25, 2011 at 4:42 PM, H.J. Lu <hjl.tools@gmail.com> wrote:
> On Wed, May 25, 2011 at 7:00 AM, Uros Bizjak <ubizjak@gmail.com> wrote:
>> On Tue, May 24, 2011 at 5:54 PM, H.J. Lu <hongjiu.lu@intel.com> wrote:
>>> Hi,
>>>
>>> We are working on a new optimization, which turns off TARGET_MOVX.
>>> GCC generates:
>>>
>>> movb %ah, %dil
>>>
>>> But %ah can only be used with %[abcd][hl]. ?This patch adds QIreg_operand
>>> and uses it in *movqi_extv_1_rex64/*movqi_extzv_2_rex64. ?OK for trunk
>>> if there is no regression? and Replace
       q_regs_operand with QIreg_operand.
       (
>>
>> If this is the case, then please change "q_regs_operand" predicate to
>> accept just QI_REG_P registers.
>>
>
> I thought about it. ?It is a problem only with %[abcd]h. ?I am not sure if
> changing q_regs_operand to ?accept just QI_REG_P registers will negatively
> impact

I see. The patch is OK then, but for consistency, please change the
predicate of *movqi_extv_1*movqi_extzv_2 as well. Oh, and the
"register_operand" check in "type" calculation can be removed.

Thanks,
Uros.