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On Mon, Apr 11, 2011 at 10:54 PM, Uros Bizjak <ubizjak@gmail.com> wrote: > Attached patch merges "Parallel bitwise logical operations" section of > sse.md. ?In addition to the merge, the patch also enables these > patterns for TARGET_SSE (using PS version of the insn) and handles > TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL target flag. Actually, TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL applies only to parallel _FLOAT_ patterns. Attached is the patch that was actually committed. 2011-04-12 Uros Bizjak <ubizjak@gmail.com> * config/i386/sse.md (VI): New mode iterator. (SSEMODEI): Remove. (AVX256MODEI): Ditto. (AVXMODEF4P): Ditto. (avxvecpsmode): Ditto. (one_cmpl<mode>2): Enable for TARGET_SSE. Use VI mode iterator. (sse2_andnot<mode>3): New expander. (*andnot<mode>3): Merge with *sse2_andnot<mode>3 and *avx_andnot<mode>3. Enable for TARGET_SSE. Use VI mode iterator. (<any_logic:code><mode>3): Use VI mode iterator. (*<any_logic:code><mode>3): Merge with *sse2_<any_logic:code><mode>3 and *avx_<any_logic:code><mode>3. Use VI mode iterator. (*andnottf3): Handle AVX three-operand constraints. (*<any_logic:code>tf3): Handle AVX three-operand constraints. Re-tested on x86_64-pc-linux-gnu {,-m32} AVX target, committed to mainline SVN. Uros.
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