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[x32] PR target/47744: [x32] ICE: in reload_cse_simplify_operands, at postreload.c:403
- From: "H.J. Lu" <hongjiu dot lu at intel dot com>
- To: gcc-patches at gcc dot gnu dot org
- Date: Fri, 1 Apr 2011 22:30:58 -0700
- Subject: [x32] PR target/47744: [x32] ICE: in reload_cse_simplify_operands, at postreload.c:403
- Reply-to: "H.J. Lu" <hjl dot tools at gmail dot com>
I checked in this patch.
H.J.
---
commit 230fad69a62607b1845bc04f4b33bdad398cc4e4
Author: H.J. Lu <hjl.tools@gmail.com>
Date: Thu Mar 17 18:26:35 2011 -0700
Add ZERO_EXTEND PLUS base support to ix86_simplify_base_disp.
diff --git a/gcc/ChangeLog.x32 b/gcc/ChangeLog.x32
index 6d5eda6..8dd7196 100644
--- a/gcc/ChangeLog.x32
+++ b/gcc/ChangeLog.x32
@@ -1,3 +1,9 @@
+2011-03-17 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR target/47744
+ * config/i386/i386.c (ix86_simplify_base_disp): Add ZERO_EXTEND
+ PLUS base support.
+
2011-03-16 H.J. Lu <hongjiu.lu@intel.com>
PR rtl-optimization/48155
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index fd49865..73ce73a 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -11637,6 +11637,19 @@ ix86_live_on_entry (bitmap regs)
(reg/f:SI 7 sp))
(const_int [CONST1 + CONST2])))
+ We also translate
+
+ (plus:DI (zero_extend:DI (plus:SI (plus:SI (reg:SI 4 si [70])
+ (reg:SI 2 cx [86]))
+ (const_int CONST1)))
+ (const_int CONST2))
+
+ into
+
+ (plus:DI (zero_extend:DI (plus:SI (reg:SI 4 si [70])
+ (reg:SI 2 cx [86]))
+ (const_int [CONST1 + CONST2])))
+
If PLUS is true, we also translate
(set (reg:SI 40 r11)
@@ -11678,7 +11691,13 @@ ix86_simplify_base_disp (rtx *base_p, rtx *disp_p, bool plus)
rtx op1 = XEXP (base, 1);
rtx addend;
- if (REG_P (op0) && CONST_INT_P (op1))
+ if ((REG_P (op0)
+ || (!plus
+ && GET_CODE (op0) == PLUS
+ && GET_MODE (op0) == ptr_mode
+ && REG_P (XEXP (op0, 0))
+ && REG_P (XEXP (op0, 1))))
+ && CONST_INT_P (op1))
{
base = op0;
addend = op1;
@@ -11717,7 +11736,12 @@ ix86_simplify_base_disp (rtx *base_p, rtx *disp_p, bool plus)
*disp_p = GEN_INT (INTVAL (disp) + INTVAL (addend));
if (!plus)
- *base_p = gen_rtx_REG (ptr_mode, REGNO (base));
+ {
+ if (REG_P (base))
+ *base_p = gen_rtx_REG (ptr_mode, REGNO (base));
+ else
+ *base_p = base;
+ }
}
}