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Fix PR 45844, gfortran.dg/vect/pr45714-b.f ICE on power7


The vsx splat load from memory insns manage to evade
reg_offset_addressing_ok_p since their MEM mode is DFmode or DImode,
which are not (usually) vector modes.  This patch prevents reload
damage in rs6000_legitimize_reload_address, and ensures the splat insn
predicate is sufficiently strict.  Bootstrapped etc. powerpc64-linux
on power7 hardware.  OK to apply?

	PR target/45844
	* config/rs6000/rs6000.c (rs6000_legitimize_reload_address): Don't
	create invalid offset address for vsx splat insn.
	* config/rs6000/predicates.md (splat_input_operand): New.
	* config/rs6000/vsx.md (vsx_splat_*): Use it.

Index: gcc/config/rs6000/rs6000.c
===================================================================
--- gcc/config/rs6000/rs6000.c	(revision 170978)
+++ gcc/config/rs6000/rs6000.c	(working copy)
@@ -6579,6 +6676,14 @@ rs6000_legitimize_reload_address (rtx x,
 {
   bool reg_offset_p = reg_offset_addressing_ok_p (mode);
 
+  /* Nasty hack for vsx_splat_V2DF/V2DI load from mem, which takes a
+     DFmode/DImode MEM.  */
+  if (reg_offset_p
+      && opnum == 1
+      && ((mode == DFmode && recog_data.operand_mode[0] == V2DFmode)
+	  || (mode == DImode && recog_data.operand_mode[0] == V2DImode)))
+    reg_offset_p = false;
+
   /* We must recognize output that we have already generated ourselves.  */
   if (GET_CODE (x) == PLUS
       && GET_CODE (XEXP (x, 0)) == PLUS
Index: gcc/config/rs6000/predicates.md
===================================================================
--- gcc/config/rs6000/predicates.md	(revision 170978)
+++ gcc/config/rs6000/predicates.md	(working copy)
@@ -871,6 +871,23 @@ (define_predicate "input_operand"
   return 0;
 })
 
+;; Return 1 if this operand is a valid input for a vsx_splat insn.
+(define_predicate "splat_input_operand"
+  (match_code "label_ref,symbol_ref,const,high,reg,subreg,mem,
+	       const_double,const_vector,const_int,plus")
+{
+  if (MEM_P (op))
+    {
+      if (mode == DFmode)
+	mode = V2DFmode;
+      else if (mode == DImode)
+	mode = V2DImode;
+      else
+	gcc_unreachable ();        
+    }
+  return input_operand (op, mode);
+})
+
 ;; Return true if OP is an invalid SUBREG operation on the e500.
 (define_predicate "rs6000_nonimmediate_operand"
   (match_code "reg,subreg,mem")
Index: gcc/config/rs6000/vsx.md
===================================================================
--- gcc/config/rs6000/vsx.md	(revision 170978)
+++ gcc/config/rs6000/vsx.md	(working copy)
@@ -1076,7 +1076,7 @@ (define_insn "*vsx_xxpermdi2_<mode>"
 (define_insn "vsx_splat_<mode>"
   [(set (match_operand:VSX_D 0 "vsx_register_operand" "=wd,wd,wd,?wa,?wa,?wa")
 	(vec_duplicate:VSX_D
-	 (match_operand:<VS_scalar> 1 "input_operand" "ws,f,Z,wa,wa,Z")))]
+	 (match_operand:<VS_scalar> 1 "splat_input_operand" "ws,f,Z,wa,wa,Z")))]
   "VECTOR_MEM_VSX_P (<MODE>mode)"
   "@
    xxpermdi %x0,%x1,%x1,0

-- 
Alan Modra
Australia Development Lab, IBM


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