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Re: [PATCH: PR target/46631] Change operands order so we can use 16bit AND instead of 32bit in thumb2


On Tue, Nov 30, 2010 at 3:21 PM, Carrot Wei <carrot@google.com> wrote:
> Hi
>
> An instruction of the following style is 32 bit in thumb2.
>  Âand  Âr2, r3, r2
>
> If we change the source operands order, it will be 16 bit.
>  Âands  Âr2, r2, r3
>
> This patch contains a new peephole2 to detect the situation that the all 3
> operands of AND are low registers, and the target is the same as the second
> source, then replace it with another AND with its source operands exchanged.


Looking at what thumb1 does:
      if (GET_CODE (operands[2]) != CONST_INT)
        {
          rtx tmp = force_reg (SImode, operands[2]);
          if (rtx_equal_p (operands[0], operands[1]))
            operands[2] = tmp;
          else
            {
              operands[2] = operands[1];
              operands[1] = tmp;
            }
        }
I almost think thumb2 should do the same (maybe it should be done
always in the arm back-end).

Thanks,
Andrew Pinski


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