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Re: [RFC - ARM] - Fix PR43440 - Fix Neon inline asm register aliasing issues.
- From: Richard Earnshaw <Richard dot Earnshaw at buzzard dot freeserve dot co dot uk>
- To: Richard Henderson <rth at redhat dot com>
- Cc: Richard Earnshaw <rearnsha at arm dot com>, ramana dot radhakrishnan at arm dot com, gcc-patches at gcc dot gnu dot org, rguenther at suse dot de
- Date: Sat, 13 Nov 2010 23:21:41 +0000
- Subject: Re: [RFC - ARM] - Fix PR43440 - Fix Neon inline asm register aliasing issues.
- References: <alpine.DEB.2.00.1003200039160.9269@liliput> <1269268484.20488.18.camel@e200601-lin.cambridge.arm.com> <1288193560.2025.8.camel@rwe-pc> <4CC86631.3060906@redhat.com> <1288202539.2898.2.camel@rwe-pc> <4CC870DC.70004@redhat.com>
On 27/10/10 19:35, Richard Henderson wrote:
> On 10/27/2010 02:02 PM, Richard Earnshaw wrote:
>> On Wed, 2010-10-27 at 13:49 -0400, Richard Henderson wrote:
>>> On 10/27/2010 11:32 AM, Richard Earnshaw wrote:
>>>> PING - this needs a GWP review, I think.
>>>
>>> Pointer to the actual patch?
>>
>> http://gcc.gnu.org/ml/gcc-patches/2010-03/msg00978.html
>>
>>>
>>> I had a look back at the original TARGET_MD_ASM_CLOBBERS
>>> patch and thought it looked pretty good.
>>>
>>> I can't immediately think what good the O_R_N macro can
>>> do outside the context of the asm clobbers. And if that
>>> is the case, I can't imagine that this new macro is any
>>> cleaner than the already clean T_M_A_C patch.
>>>
>>
>> My patch doesn't have the side effects that Ramana originally
>> mentioned. It also works correctly when -ffixed-<reg> and friends are
>> used on the command line.
>
> I see, yes.
>
> Your patch is ok. Remember to update tm.texi.in now.
>
> I don't think a target hook is really needed until we come up with
> a way to handle the other register definition macros too. I think
> the interface for register names, numbers, classes, etc probably
> want a unified solution rather than simple-minded piecemeal changes.
Since I've had to update the patch slightly for more recent changes,
here's the patch as finally committed.
2010-11-13 Richard Earnshaw <rearnsha@arm.com>
PR target/43440
* tm.texi.in (OVERLAPPING_REGISTER_NAMES): Document new macro.
* tm.texi: Regenerated.
* output.h (decode_reg_name_and_count): Declare.
* varasm.c (decode_reg_name_and_count): New function.
(decode_reg_name): Reimplement using decode_reg_name_and_count.
* reginfo.c (fix_register): Use decode_reg_name_and_count and
iterate over all regs used.
* stmt.c (expand_asm_operands): Likewise.
* arm/aout.h (OVERLAPPING_REGISTER_NAMES): Define.
(ADDITIONAL_REGISTER_NAMES): Remove aliases that overlap
multiple machine registers.
diff --git a/gcc/config/arm/aout.h b/gcc/config/arm/aout.h
index 5abad67..b5f7109 100644
--- a/gcc/config/arm/aout.h
+++ b/gcc/config/arm/aout.h
@@ -163,31 +163,45 @@
{"mvdx12", 39}, \
{"mvdx13", 40}, \
{"mvdx14", 41}, \
- {"mvdx15", 42}, \
- {"d0", 63}, {"q0", 63}, \
- {"d1", 65}, \
- {"d2", 67}, {"q1", 67}, \
- {"d3", 69}, \
- {"d4", 71}, {"q2", 71}, \
- {"d5", 73}, \
- {"d6", 75}, {"q3", 75}, \
- {"d7", 77}, \
- {"d8", 79}, {"q4", 79}, \
- {"d9", 81}, \
- {"d10", 83}, {"q5", 83}, \
- {"d11", 85}, \
- {"d12", 87}, {"q6", 87}, \
- {"d13", 89}, \
- {"d14", 91}, {"q7", 91}, \
- {"d15", 93}, \
- {"q8", 95}, \
- {"q9", 99}, \
- {"q10", 103}, \
- {"q11", 107}, \
- {"q12", 111}, \
- {"q13", 115}, \
- {"q14", 119}, \
- {"q15", 123} \
+ {"mvdx15", 42} \
+}
+#endif
+
+#ifndef OVERLAPPING_REGISTER_NAMES
+#define OVERLAPPING_REGISTER_NAMES \
+{ \
+ {"d0", 63, 2}, \
+ {"d1", 65, 2}, \
+ {"d2", 67, 2}, \
+ {"d3", 69, 2}, \
+ {"d4", 71, 2}, \
+ {"d5", 73, 2}, \
+ {"d6", 75, 2}, \
+ {"d7", 77, 2}, \
+ {"d8", 79, 2}, \
+ {"d9", 81, 2}, \
+ {"d10", 83, 2}, \
+ {"d11", 85, 2}, \
+ {"d12", 87, 2}, \
+ {"d13", 89, 2}, \
+ {"d14", 91, 2}, \
+ {"d15", 93, 2}, \
+ {"q0", 63, 4}, \
+ {"q1", 67, 4}, \
+ {"q2", 71, 4}, \
+ {"q3", 75, 4}, \
+ {"q4", 79, 4}, \
+ {"q5", 83, 4}, \
+ {"q6", 87, 4}, \
+ {"q7", 91, 4}, \
+ {"q8", 95, 4}, \
+ {"q9", 99, 4}, \
+ {"q10", 103, 4}, \
+ {"q11", 107, 4}, \
+ {"q12", 111, 4}, \
+ {"q13", 115, 4}, \
+ {"q14", 119, 4}, \
+ {"q15", 123, 4} \
}
#endif
diff --git a/gcc/doc/tm.texi b/gcc/doc/tm.texi
index 229916d..5446501 100644
--- a/gcc/doc/tm.texi
+++ b/gcc/doc/tm.texi
@@ -8479,6 +8479,22 @@ registers, thus allowing the @code{asm} option in declarations to refer
to registers using alternate names.
@end defmac
+@defmac OVERLAPPING_REGISTER_NAMES
+If defined, a C initializer for an array of structures containing a
+name, a register number and a count of the number of consecutive
+machine registers the name overlaps. This macro defines additional
+names for hard registers, thus allowing the @code{asm} option in
+declarations to refer to registers using alternate names. Unlike
+@code{ADDITIONAL_REGISTER_NAMES}, this macro should be used when the
+register name implies multiple underlying registers.
+
+This macro should be used when it is important that a clobber in an
+@code{asm} statement clobbers all the underlying values implied by the
+register name. For example, on ARM, clobbering the double-precision
+VFP register ``d0'' implies clobbering both single-precision registers
+``s0'' and ``s1''.
+@end defmac
+
@defmac ASM_OUTPUT_OPCODE (@var{stream}, @var{ptr})
Define this macro if you are using an unusual assembler that
requires different names for the machine instructions.
diff --git a/gcc/doc/tm.texi.in b/gcc/doc/tm.texi.in
index a9bc604..4b21c92 100644
--- a/gcc/doc/tm.texi.in
+++ b/gcc/doc/tm.texi.in
@@ -8453,6 +8453,22 @@ registers, thus allowing the @code{asm} option in declarations to refer
to registers using alternate names.
@end defmac
+@defmac OVERLAPPING_REGISTER_NAMES
+If defined, a C initializer for an array of structures containing a
+name, a register number and a count of the number of consecutive
+machine registers the name overlaps. This macro defines additional
+names for hard registers, thus allowing the @code{asm} option in
+declarations to refer to registers using alternate names. Unlike
+@code{ADDITIONAL_REGISTER_NAMES}, this macro should be used when the
+register name implies multiple underlying registers.
+
+This macro should be used when it is important that a clobber in an
+@code{asm} statement clobbers all the underlying values implied by the
+register name. For example, on ARM, clobbering the double-precision
+VFP register ``d0'' implies clobbering both single-precision registers
+``s0'' and ``s1''.
+@end defmac
+
@defmac ASM_OUTPUT_OPCODE (@var{stream}, @var{ptr})
Define this macro if you are using an unusual assembler that
requires different names for the machine instructions.
diff --git a/gcc/output.h b/gcc/output.h
index fa223d5..07372a3 100644
--- a/gcc/output.h
+++ b/gcc/output.h
@@ -177,6 +177,11 @@ extern enum tls_model decl_default_tls_model (const_tree);
Prefixes such as % are optional. */
extern int decode_reg_name (const char *);
+/* Similar to decode_reg_name, but takes an extra parameter that is a
+ pointer to the number of (internal) registers described by the
+ external name. */
+extern int decode_reg_name_and_count (const char *, int *);
+
extern void assemble_alias (tree, tree);
extern void default_assemble_visibility (tree, int);
diff --git a/gcc/reginfo.c b/gcc/reginfo.c
index 65243cb..86a20d3 100644
--- a/gcc/reginfo.c
+++ b/gcc/reginfo.c
@@ -755,64 +755,69 @@ void
fix_register (const char *name, int fixed, int call_used)
{
int i;
+ int reg, nregs;
/* Decode the name and update the primary form of
the register info. */
- if ((i = decode_reg_name (name)) >= 0)
+ if ((reg = decode_reg_name_and_count (name, &nregs)) >= 0)
{
- if ((i == STACK_POINTER_REGNUM
+ gcc_assert (nregs >= 1);
+ for (i = reg; i < reg + nregs; i++)
+ {
+ if ((i == STACK_POINTER_REGNUM
#ifdef HARD_FRAME_POINTER_REGNUM
- || i == HARD_FRAME_POINTER_REGNUM
+ || i == HARD_FRAME_POINTER_REGNUM
#else
- || i == FRAME_POINTER_REGNUM
+ || i == FRAME_POINTER_REGNUM
#endif
- )
- && (fixed == 0 || call_used == 0))
- {
- switch (fixed)
+ )
+ && (fixed == 0 || call_used == 0))
{
- case 0:
- switch (call_used)
+ switch (fixed)
{
case 0:
- error ("can%'t use %qs as a call-saved register", name);
+ switch (call_used)
+ {
+ case 0:
+ error ("can%'t use %qs as a call-saved register", name);
+ break;
+
+ case 1:
+ error ("can%'t use %qs as a call-used register", name);
+ break;
+
+ default:
+ gcc_unreachable ();
+ }
break;
case 1:
- error ("can%'t use %qs as a call-used register", name);
+ switch (call_used)
+ {
+ case 1:
+ error ("can%'t use %qs as a fixed register", name);
+ break;
+
+ case 0:
+ default:
+ gcc_unreachable ();
+ }
break;
default:
gcc_unreachable ();
}
- break;
-
- case 1:
- switch (call_used)
- {
- case 1:
- error ("can%'t use %qs as a fixed register", name);
- break;
-
- case 0:
- default:
- gcc_unreachable ();
- }
- break;
-
- default:
- gcc_unreachable ();
}
- }
- else
- {
- fixed_regs[i] = fixed;
- call_used_regs[i] = call_used;
+ else
+ {
+ fixed_regs[i] = fixed;
+ call_used_regs[i] = call_used;
#ifdef CALL_REALLY_USED_REGISTERS
- if (fixed == 0)
- call_really_used_regs[i] = call_used;
+ if (fixed == 0)
+ call_really_used_regs[i] = call_used;
#endif
+ }
}
}
else
diff --git a/gcc/stmt.c b/gcc/stmt.c
index c8f56f5..e24ed4e 100644
--- a/gcc/stmt.c
+++ b/gcc/stmt.c
@@ -687,13 +687,14 @@ expand_asm_operands (tree string, tree outputs, tree inputs,
for (tail = clobbers; tail; tail = TREE_CHAIN (tail))
{
const char *regname;
+ int nregs;
if (TREE_VALUE (tail) == error_mark_node)
return;
regname = TREE_STRING_POINTER (TREE_VALUE (tail));
- i = decode_reg_name (regname);
- if (i >= 0 || i == -4)
+ i = decode_reg_name_and_count (regname, &nregs);
+ if (i == -4)
++nclobbers;
else if (i == -2)
error ("unknown register name %qs in %<asm%>", regname);
@@ -701,14 +702,21 @@ expand_asm_operands (tree string, tree outputs, tree inputs,
/* Mark clobbered registers. */
if (i >= 0)
{
- /* Clobbering the PIC register is an error. */
- if (i == (int) PIC_OFFSET_TABLE_REGNUM)
+ int reg;
+
+ for (reg = i; reg < i + nregs; reg++)
{
- error ("PIC register %qs clobbered in %<asm%>", regname);
- return;
- }
+ ++nclobbers;
+
+ /* Clobbering the PIC register is an error. */
+ if (reg == (int) PIC_OFFSET_TABLE_REGNUM)
+ {
+ error ("PIC register clobbered by %qs in %<asm%>", regname);
+ return;
+ }
- SET_HARD_REG_BIT (clobbered_regs, i);
+ SET_HARD_REG_BIT (clobbered_regs, reg);
+ }
}
}
@@ -1033,7 +1041,8 @@ expand_asm_operands (tree string, tree outputs, tree inputs,
for (tail = clobbers; tail; tail = TREE_CHAIN (tail))
{
const char *regname = TREE_STRING_POINTER (TREE_VALUE (tail));
- int j = decode_reg_name (regname);
+ int reg, nregs;
+ int j = decode_reg_name_and_count (regname, &nregs);
rtx clobbered_reg;
if (j < 0)
@@ -1055,30 +1064,39 @@ expand_asm_operands (tree string, tree outputs, tree inputs,
continue;
}
- /* Use QImode since that's guaranteed to clobber just one reg. */
- clobbered_reg = gen_rtx_REG (QImode, j);
-
- /* Do sanity check for overlap between clobbers and respectively
- input and outputs that hasn't been handled. Such overlap
- should have been detected and reported above. */
- if (!clobber_conflict_found)
+ for (reg = j; reg < j + nregs; reg++)
{
- int opno;
-
- /* We test the old body (obody) contents to avoid tripping
- over the under-construction body. */
- for (opno = 0; opno < noutputs; opno++)
- if (reg_overlap_mentioned_p (clobbered_reg, output_rtx[opno]))
- internal_error ("asm clobber conflict with output operand");
-
- for (opno = 0; opno < ninputs - ninout; opno++)
- if (reg_overlap_mentioned_p (clobbered_reg,
- ASM_OPERANDS_INPUT (obody, opno)))
- internal_error ("asm clobber conflict with input operand");
- }
+ /* Use QImode since that's guaranteed to clobber just
+ * one reg. */
+ clobbered_reg = gen_rtx_REG (QImode, reg);
+
+ /* Do sanity check for overlap between clobbers and
+ respectively input and outputs that hasn't been
+ handled. Such overlap should have been detected and
+ reported above. */
+ if (!clobber_conflict_found)
+ {
+ int opno;
+
+ /* We test the old body (obody) contents to avoid
+ tripping over the under-construction body. */
+ for (opno = 0; opno < noutputs; opno++)
+ if (reg_overlap_mentioned_p (clobbered_reg,
+ output_rtx[opno]))
+ internal_error
+ ("asm clobber conflict with output operand");
+
+ for (opno = 0; opno < ninputs - ninout; opno++)
+ if (reg_overlap_mentioned_p (clobbered_reg,
+ ASM_OPERANDS_INPUT (obody,
+ opno)))
+ internal_error
+ ("asm clobber conflict with input operand");
+ }
- XVECEXP (body, 0, i++)
- = gen_rtx_CLOBBER (VOIDmode, clobbered_reg);
+ XVECEXP (body, 0, i++)
+ = gen_rtx_CLOBBER (VOIDmode, clobbered_reg);
+ }
}
if (nlabels > 0)
diff --git a/gcc/varasm.c b/gcc/varasm.c
index 0c80c93..215e0ed 100644
--- a/gcc/varasm.c
+++ b/gcc/varasm.c
@@ -764,8 +764,11 @@ set_user_assembler_name (tree decl, const char *name)
Prefixes such as % are optional. */
int
-decode_reg_name (const char *asmspec)
+decode_reg_name_and_count (const char *asmspec, int *pnregs)
{
+ /* Presume just one register is clobbered. */
+ *pnregs = 1;
+
if (asmspec != 0)
{
int i;
@@ -791,6 +794,25 @@ decode_reg_name (const char *asmspec)
&& ! strcmp (asmspec, strip_reg_name (reg_names[i])))
return i;
+#ifdef OVERLAPPING_REGISTER_NAMES
+ {
+ static const struct
+ {
+ const char *const name;
+ const int number;
+ const int nregs;
+ } table[] = OVERLAPPING_REGISTER_NAMES;
+
+ for (i = 0; i < (int) ARRAY_SIZE (table); i++)
+ if (table[i].name[0]
+ && ! strcmp (asmspec, table[i].name))
+ {
+ *pnregs = table[i].nregs;
+ return table[i].number;
+ }
+ }
+#endif /* OVERLAPPING_REGISTER_NAMES */
+
#ifdef ADDITIONAL_REGISTER_NAMES
{
static const struct { const char *const name; const int number; } table[]
@@ -814,6 +836,14 @@ decode_reg_name (const char *asmspec)
return -1;
}
+
+int
+decode_reg_name (const char *name)
+{
+ int count;
+ return decode_reg_name_and_count (name, &count);
+}
+
/* Return true if DECL's initializer is suitable for a BSS section. */