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Re: [patch 1/2] AMD bdver2 processors - BMI
- From: Richard Henderson <rth at redhat dot com>
- To: Quentin Neill <quentin dot neill dot gnu at gmail dot com>
- Cc: gcc-patches at gcc dot gnu dot org
- Date: Tue, 02 Nov 2010 08:53:07 -0700
- Subject: Re: [patch 1/2] AMD bdver2 processors - BMI
- References: <AANLkTi=qeyynu3ejZeW-QWvq42kx76GVMOCpsV_uc9Gb@mail.gmail.com> <AANLkTi=4QwbGuhgoOJ8HJBoMT6+o_ctcB0ZKFY7GZemail@example.com> <4CCA4375.firstname.lastname@example.org> <AANLkTimWEg1nQh6smqQ9sqYUibb22+VCbg=JdHd01Q9T@mail.gmail.com>
On 11/02/2010 05:27 AM, Quentin Neill wrote:
> Actually BSF indexes the lowest set bit, TZCNT counts zeros, so if I'm
> thinking clearly BSF(X)==TZCNT(X)+1
Nope. Looking carefully the differences are:
Result for 0 Undefined Operand-Width
ZF Set iff 0 input Set iff 0 output
CF Undefined Set iff 0 input
otherwise the actual value result is identical.
>> /* The value at zero is only defined for the BMI instruction
>> TZCNT, not the BSF insn in the original isa. */
>> #define CTZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) \
>> ((VALUE) = GET_MODE_BITSIZE (MODE), TARGET_BMI)
> I take it his goes in defaults.h? How do I test this?
This goes in i386.h. Test this by seeing that __builtin_ctz
with a constant operand 0 gets folded properly. Note that
there's a CLZ_DEFINED_VALUE_AT_ZERO as well, which would be
used for the LZCNT instruction.
>> Note that this has already been done for lzcnt as present
>> in the ABM extension.
> I believe the LZCNT instruction is not a part of the BMI extension,
> I've removed it from the list of mnemonics.
It is according rev 2.06 of the manual you gave me.
# Support for the LZCNT instruction is indicated by ECX bit 5 (LZCNT) as returned by CPUID
# function 8000_0001h or EBX bit 3 (BMI) as returned by CPUID function 0000_0007h.
While this manual appears to have renamed the bit, gcc's cpuid.h
records 0x80000001 bit 5 as ABM, so it *is* the same instruction.
You simply need to adjust the conditions under which we generate it.