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Re: PATCH: Pad short functions for Atom
- From: Richard Henderson <rth at redhat dot com>
- To: "H.J. Lu" <hjl dot tools at gmail dot com>
- Cc: "H.J. Lu" <hongjiu dot lu at intel dot com>, gcc-patches at gcc dot gnu dot org, Uros Bizjak <ubizjak at gmail dot com>
- Date: Wed, 15 Sep 2010 15:37:55 -0700
- Subject: Re: PATCH: Pad short functions for Atom
- References: <20100913145422.GA21719@intel.com>
On 09/13/2010 07:54 AM, H.J. Lu wrote:
> xops[1] = gen_rtx_MEM (Pmode, stack_pointer_rtx);
> + /* Pad stack IP move with 4 instructions. 2 NOPs count as 1
> + instruction. */
> + if (TARGET_PAD_SHORT_FUNCTION)
> + output_asm_insn (".byte 0x90, 0x90, 0x90, 0x90, 0x90, 0x90, "
> + "0x90, 0x90", xops);
What's wrong with "nop" instead of ".byte"?
Similarly for "return_nops".
> +/* Pad short funtion to 4 instructions. */
> +
> +static void
> +ix86_pad_short_function (void)
> +{
> + edge e;
> + edge_iterator ei;
> +
> + /* Set up block info for each basic block. */
> + alloc_aux_for_blocks (sizeof (struct block_info_def));
> +
> + FOR_EACH_EDGE (e, ei, EXIT_BLOCK_PTR->preds)
> + {
> + rtx ret = BB_END (e->src);
> + if (JUMP_P (ret) && GET_CODE (PATTERN (ret)) == RETURN)
> + {
> + int insn_count = ix86_count_insn (e->src);
> +
> + /* Pad short function. */
> + if (insn_count < 4)
> + {
> + emit_jump_insn_before (gen_return_nops (GEN_INT (insn_count)),
> + ret);
> + delete_insn (ret);
> + }
> + }
> + }
Surely this is overkill. Why not assume that any function
with more than a single basic block is not short? You can
then significantly simplify these two functions.
I'll also say that this will break the as-yet unsubmitted
Windows x64 SEH code. In order to reduce the size of the
unwind information, the form of epilogues is tightly
constrained. See
http://msdn.microsoft.com/en-US/library/tawsa7cb%28v=VS.80%29.aspx
In order to work with SEH, you'll need to put the nops
before the epilogue, and not attach them to the return pattern.
r~