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Re: Vector misalignment

From: Artem Shinkarov <artyom dot shinkaroff at gmail dot com>
To: Andrew Pinski <pinskia at gmail dot com>
Cc: gcc-patches at gcc dot gnu dot org, Richard Guenther <richard dot guenther at gmail dot com>
Date: Mon, 16 Aug 2010 19:25:46 +0100
Subject: Re: Vector misalignment
References: <AANLkTimAJL33OqDH0Qv=FrGRpkk6q3zkNed9L+5QCp-i@mail.gmail.com> <AANLkTikf=gfbbu3bXiwV1upm35Of9EDtrNHmcxVcuK4m@mail.gmail.com>

On Mon, Aug 16, 2010 at 7:18 PM, Andrew Pinski <pinskia@gmail.com> wrote:
> On Mon, Aug 16, 2010 at 11:15 AM, Artem Shinkarov
> <artyom.shinkaroff@gmail.com> wrote:
>> would produce no warnings, but causes a segmentation fault on intel
>> and powerpc architecture.
>
> How will it produce a seg fault on PPC (VMX) targets? ?The VMX load
> instructions don't fault but rather just use the "aligned" address.
>
> -- Pinski
>

I may be wrong about PPC, I tested it quite some time ago on mac with
AltiVec, but the point is that gcc inserts an aligned vector move
instruction instead of unaligned (that surely happens on Intel). It is
correct in terms of gcc, but if user made a mistake there is no chance
that the compiler would warn him.

Artem.

References:
- Vector misalignment
  - From: Artem Shinkarov
- Re: Vector misalignment
  - From: Andrew Pinski

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