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Re: [patch] microMIPS ASE instruction set support [Part 1]
- From: "Maciej W. Rozycki" <macro at codesourcery dot com>
- To: Chao-ying Fu <fu at mips dot com>, Andrew Pinski <pinskia at gmail dot com>
- Cc: Catherine Moore <clm at codesourcery dot com>, gcc-patches <gcc-patches at gcc dot gnu dot org>, CodeSourcery MIPS list <gnu-mips-sgxx at codesourcery dot com>, Richard Sandiford <rdsandiford at googlemail dot com>
- Date: Wed, 16 Jun 2010 08:24:20 +0100 (BST)
- Subject: Re: [patch] microMIPS ASE instruction set support [Part 1]
- References: <4C17F9FC.5010909@codesourcery.com> <AANLkTin1__5wFm77brusU1dR9FcAG1CnaEjdlwqnWqn9@mail.gmail.com>
On Tue, 15 Jun 2010, Andrew Pinski wrote:
> > Please let me know if this patch looks okay to commit.
> > ? ? ? ?* passes.c (init_optimization_passes): Call peephole2.
>
> Could you explain more about why you are using another peephole2 here
> and why the current position of peephole2 is not being efficient?
> Was it because there would be some peephole cases missed? Like what
> was referenced in
> http://gcc.gnu.org/ml/gcc-patches/2010-04/msg01714.html (since both
> are dealing with load/store multiple)?
I believe it is related to the use of MOVEP (move a pair of registers)
instruction, so it may be a similar issue indeed.
Chao-ying, this is your original comment: "I found out that after sched2,
we can run peephole2 to save code size more." -- would you please
elaborate?
Maciej