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[PATCH, ARM] fix PR 43469


This is a bug in the TLS generation code where the plus constraint
causes reload to get confused when a register value that contains a
const expression gets spilled (it ends up trying to create an output
reload to write back into the const).

Fixed by reworking the pattern to use tied operands rather than '+' in
the constraint.  This gives marginally better flexibility since now we
can allow the pattern to load the result into the source operand rather
than clobbering a second register.

Tested on a bootstrap of arm-linux-gnueabi with Thumb2.

2010-04-02  Richard Earnshaw  <rearnsha@arm.com>

	PR target/43469
	* arm.c (legitimize_tls_address): Adjust call to 
	gen_tls_load_dot_plus_four.
	(arm_note_pic_base): New function.
	(arm_cannot_copy_insn_p): Use it.
	* thumb2.md (tls_load_dot_plus_four): Rework to avoid use of '+' in
	constraint.


diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 6f42dd0..51eac9d 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -5843,7 +5843,7 @@ legitimize_tls_address (rtx x, rtx reg)
       if (TARGET_ARM)
 	emit_insn (gen_tls_load_dot_plus_eight (reg, reg, labelno));
       else if (TARGET_THUMB2)
-	emit_insn (gen_tls_load_dot_plus_four (reg, reg, labelno));
+	emit_insn (gen_tls_load_dot_plus_four (reg, NULL, reg, labelno));
       else
 	{
 	  emit_insn (gen_pic_add_dot_plus_four (reg, reg, labelno));
@@ -8801,28 +8801,21 @@ tls_mentioned_p (rtx x)
     }
 }
 
-/* Must not copy a SET whose source operand is PC-relative.  */
+/* Must not copy any rtx that uses a pc-relative address.  */
+
+static int
+arm_note_pic_base (rtx *x, void *date ATTRIBUTE_UNUSED)
+{
+  if (GET_CODE (*x) == UNSPEC
+      && XINT (*x, 1) == UNSPEC_PIC_BASE)
+    return 1;
+  return 0;
+}
 
 static bool
 arm_cannot_copy_insn_p (rtx insn)
 {
-  rtx pat = PATTERN (insn);
-
-  if (GET_CODE (pat) == SET)
-    {
-      rtx rhs = SET_SRC (pat);
-
-      if (GET_CODE (rhs) == UNSPEC
-	  && XINT (rhs, 1) == UNSPEC_PIC_BASE)
-	return TRUE;
-
-      if (GET_CODE (rhs) == MEM
-	  && GET_CODE (XEXP (rhs, 0)) == UNSPEC
-	  && XINT (XEXP (rhs, 0), 1) == UNSPEC_PIC_BASE)
-	return TRUE;
-    }
-
-  return FALSE;
+  return for_each_rtx (&PATTERN (insn), arm_note_pic_base, NULL);
 }
 
 enum rtx_code
diff --git a/gcc/config/arm/thumb2.md b/gcc/config/arm/thumb2.md
index e367351..69a5e06 100644
--- a/gcc/config/arm/thumb2.md
+++ b/gcc/config/arm/thumb2.md
@@ -244,18 +244,19 @@
 )
 
 (define_insn "tls_load_dot_plus_four"
-  [(set (match_operand:SI 0 "register_operand" "=l,r")
-	(mem:SI (unspec:SI [(match_operand:SI 1 "register_operand" "+l,r")
+  [(set (match_operand:SI 0 "register_operand" "=l,l,r,r")
+	(mem:SI (unspec:SI [(match_operand:SI 2 "register_operand" "0,1,0,1")
 			    (const_int 4)
-			    (match_operand 2 "" "")]
-			   UNSPEC_PIC_BASE)))]
+			    (match_operand 3 "" "")]
+			   UNSPEC_PIC_BASE)))
+   (clobber (match_scratch:SI 1 "=X,l,X,r"))]
   "TARGET_THUMB2"
   "*
   (*targetm.asm_out.internal_label) (asm_out_file, \"LPIC\",
-			     INTVAL (operands[2]));
-  return \"add\\t%1, %|pc\;ldr%?\\t%0, [%1]\";
+			     INTVAL (operands[3]));
+  return \"add\\t%2, %|pc\;ldr%?\\t%0, [%2]\";
   "
-  [(set_attr "length" "4,6")]
+  [(set_attr "length" "4,4,6,6")]
 )
 
 ;; Thumb-2 always has load/store halfword instructions, so we can avoid a lot

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