This is the mail archive of the
gcc-patches@gcc.gnu.org
mailing list for the GCC project.
[PATCH, ARM] Work around out-of-range branch error for Thumb-2
- From: Julian Brown <julian at codesourcery dot com>
- To: gcc-patches at gcc dot gnu dot org
- Cc: dan at codesourcery dot com, rearnsha at arm dot com, paul at codesourcery dot com
- Date: Fri, 27 Nov 2009 16:58:11 +0000
- Subject: [PATCH, ARM] Work around out-of-range branch error for Thumb-2
Hi,
This patch works around an issue which can cause the
*thumb2_addsi_short pattern to expand to a 4-byte instruction after the
regrename pass rather than a 2-byte instruction (as specified in its
length attribute). These instructions are created by a peephole2 (";;
16-bit add/sub immediate") with the correct predicates/conditions for
(two different) 16-bit opcodes, but the regrename pass runs afterwards
and can rewrite the destination register such that a four-byte insn is
needed to represent the operation in some cases.
So, this patch just tweaks the length for *thumb2_addsi_short so it is
always counted as a 4-byte instruction for length-calculation purposes.
This isn't an ideal fix, but prevents potential out-of-range branch
errors (with, e.g., cbz instructions which have only a short range).
Tested with cross-compiler to ARM EABI (with -mthumb -march=armv7-a).
OK to apply?
Julian
ChangeLog
gcc/
* config/arm/thumb2.md (thumb2_addsi_short): Change length to 4.
Index: gcc/config/arm/thumb2.md
===================================================================
--- gcc/config/arm/thumb2.md (revision 154709)
+++ gcc/config/arm/thumb2.md (working copy)
@@ -1217,7 +1217,7 @@
return \"add%!\\t%0, %1, %2\";
"
[(set_attr "predicable" "yes")
- (set_attr "length" "2")]
+ (set_attr "length" "4")]
)
(define_insn "divsi3"