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Blackfin: fixes for builtin functions
- From: Bernd Schmidt <bernds_cb1 at t-online dot de>
- To: GCC Patches <gcc-patches at gcc dot gnu dot org>
- Date: Mon, 14 Sep 2009 15:07:29 +0100
- Subject: Blackfin: fixes for builtin functions
This fixes a few problems in the Blackfin builtin expanders. Some
pretty trivial oversights with missing initializations of icode,
forgetting to force operands to registers as needed, and adding V2PDI
reload patterns to match the PDI ones for the accumulators. Most of
this is by Jie Zhang.
Bernd
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Index: ChangeLog
===================================================================
--- ChangeLog (revision 151686)
+++ ChangeLog (working copy)
@@ -9,6 +9,15 @@
(bfin_expand_epilogue): Ask do_unlink to restore FP and RETS
with saveall attribute.
+ * config/bfin/bfin.c (bfin_expand_builtin,
+ case BFIN_BUILTIN_MULT_1X32X32): Force constants to registers for the
+ operands.
+ From Jie Zhang <jie.zhang@analog.com>:
+ * config/bfin/bfin.c (bfin_expand_builtin): Initialize icodes
+ before use in two places.
+ * config/bfin/bfin.md (AREG): Define mode iterator.
+ (reload_in, reload_out): Use mode iterator AREG.
+
2009-09-14 Richard Guenther <rguenther@suse.de>
PR middle-end/41350
Index: testsuite/gcc.target/bfin/20090914-1.c
===================================================================
--- testsuite/gcc.target/bfin/20090914-1.c (revision 0)
+++ testsuite/gcc.target/bfin/20090914-1.c (revision 0)
@@ -0,0 +1,39 @@
+/* { dg-do compile { target bfin-*-* } } */
+
+typedef short __v2hi __attribute__ ((vector_size (4)));
+typedef __v2hi raw2x16;
+typedef raw2x16 fract2x16;
+
+typedef short fract16;
+typedef struct complex_fract16
+{
+ fract16 re;
+ fract16 im;
+} __attribute__ ((aligned (4))) complex_fract16;
+
+typedef union composite_complex_fract16
+{
+ struct complex_fract16 x;
+ long raw;
+} composite_complex_fract16;
+
+__inline__ __attribute__ ((always_inline))
+static complex_fract16 cmsu_fr16 (complex_fract16 _sum,
+ complex_fract16 _a, complex_fract16 _b)
+{
+ complex_fract16 r;
+ fract2x16 i =
+ __builtin_bfin_cmplx_msu (__builtin_bfin_compose_2x16
+ ((_sum).im, (_sum).re),
+ __builtin_bfin_compose_2x16 ((_a).im, (_a).re),
+ __builtin_bfin_compose_2x16 ((_b).im, (_b).re));
+ (r).re = __builtin_bfin_extract_lo (i);
+ (r).im = __builtin_bfin_extract_hi (i);
+ return r;
+}
+
+composite_complex_fract16
+f (complex_fract16 _sum, complex_fract16 _a, complex_fract16 _b)
+{
+ return (composite_complex_fract16) cmsu_fr16 (_sum, _a, _b);
+}
Index: testsuite/gcc.target/bfin/20090914-2.c
===================================================================
--- testsuite/gcc.target/bfin/20090914-2.c (revision 0)
+++ testsuite/gcc.target/bfin/20090914-2.c (revision 0)
@@ -0,0 +1,31 @@
+/* { dg-do compile { target bfin-*-* } } */
+
+typedef short fract16;
+typedef short __v2hi __attribute__ ((vector_size (4)));
+typedef __v2hi raw2x16;
+typedef raw2x16 fract2x16;
+typedef struct complex_fract16 {
+ fract16 re;
+ fract16 im;
+} __attribute__((aligned(4))) complex_fract16;
+
+
+__inline__
+__attribute__ ((always_inline))
+static complex_fract16 cmlt_fr16 (complex_fract16 _a,
+ complex_fract16 _b)
+{
+ complex_fract16 r;
+ fract2x16 i;
+
+ i = __builtin_bfin_cmplx_mul(__builtin_bfin_compose_2x16((_a).im, (_a).re),
+ __builtin_bfin_compose_2x16((_b).im, (_b).re));
+ (r).re = __builtin_bfin_extract_lo(i);
+ (r).im = __builtin_bfin_extract_hi(i);
+ return r;
+}
+
+
+complex_fract16 f(complex_fract16 a, complex_fract16 b) {
+ return cmlt_fr16(a, b);
+}
Index: testsuite/gcc.target/bfin/20090914-3.c
===================================================================
--- testsuite/gcc.target/bfin/20090914-3.c (revision 0)
+++ testsuite/gcc.target/bfin/20090914-3.c (revision 0)
@@ -0,0 +1,10 @@
+/* { dg-do compile { target bfin-*-* } } */
+typedef long fract32;
+main() {
+ fract32 val_tmp;
+ fract32 val1 = 0x7FFFFFFF;
+ fract32 val2 = 0x40000000;
+ val_tmp = __builtin_bfin_mult_fr1x32x32 (0x06666667, val1);
+ val2 = __builtin_bfin_mult_fr1x32x32 (0x79999999, val2);
+ val2 = __builtin_bfin_add_fr1x32 (val_tmp, val2);
+}
Index: testsuite/ChangeLog
===================================================================
--- testsuite/ChangeLog (revision 151686)
+++ testsuite/ChangeLog (working copy)
@@ -2,6 +2,10 @@
From Jie Zhang <jie.zhang@analog.com>:
* gcc.target/bfin/saveall.c: New test.
+ * gcc.target/bfin/20090914-1.c: New test.
+ * gcc.target/bfin/20090914-2.c: New test.
+
+ * gcc.target/bfin/20090914-3.c: New test.
2009-09-14 Andrew Stubbs <ams@codesourcery.com>
Index: config/bfin/bfin.c
===================================================================
--- config/bfin/bfin.c (revision 151686)
+++ config/bfin/bfin.c (working copy)
@@ -6342,6 +6342,10 @@ bfin_expand_builtin (tree exp, rtx targe
if (! target
|| !register_operand (target, SImode))
target = gen_reg_rtx (SImode);
+ if (! register_operand (op0, SImode))
+ op0 = copy_to_mode_reg (SImode, op0);
+ if (! register_operand (op1, SImode))
+ op1 = copy_to_mode_reg (SImode, op1);
a1reg = gen_rtx_REG (PDImode, REG_A1);
a0reg = gen_rtx_REG (PDImode, REG_A0);
@@ -6395,6 +6399,7 @@ bfin_expand_builtin (tree exp, rtx targe
op0 = expand_expr (arg0, NULL_RTX, VOIDmode, 0);
op1 = expand_expr (arg1, NULL_RTX, VOIDmode, 0);
accvec = gen_reg_rtx (V2PDImode);
+ icode = CODE_FOR_flag_macv2hi_parts;
if (! target
|| GET_MODE (target) != V2HImode
@@ -6431,6 +6436,7 @@ bfin_expand_builtin (tree exp, rtx targe
op1 = expand_expr (arg1, NULL_RTX, VOIDmode, 0);
op2 = expand_expr (arg2, NULL_RTX, VOIDmode, 0);
accvec = gen_reg_rtx (V2PDImode);
+ icode = CODE_FOR_flag_macv2hi_parts;
if (! target
|| GET_MODE (target) != V2HImode
Index: config/bfin/bfin.md
===================================================================
--- config/bfin/bfin.md (revision 151490)
+++ config/bfin/bfin.md (working copy)
@@ -1841,9 +1841,11 @@ (define_expand "reload_insi"
DONE;
})
-(define_insn "reload_inpdi"
- [(set (match_operand:PDI 0 "register_operand" "=e")
- (match_operand:PDI 1 "memory_operand" "m"))
+(define_mode_iterator AREG [PDI V2PDI])
+
+(define_insn "reload_in<mode>"
+ [(set (match_operand:AREG 0 "register_operand" "=e")
+ (match_operand:AREG 1 "memory_operand" "m"))
(clobber (match_operand:SI 2 "register_operand" "=d"))]
""
{
@@ -1861,9 +1863,9 @@ (define_insn "reload_inpdi"
(set_attr "type" "mcld")
(set_attr "length" "12")])
-(define_insn "reload_outpdi"
- [(set (match_operand:PDI 0 "memory_operand" "=m")
- (match_operand:PDI 1 "register_operand" "e"))
+(define_insn "reload_out<mode>"
+ [(set (match_operand:AREG 0 "memory_operand" "=m")
+ (match_operand:AREG 1 "register_operand" "e"))
(clobber (match_operand:SI 2 "register_operand" "=d"))]
""
{