[PATCH] testsuite/ARM: iWMMXt test fix-up

["Maciej W. Rozycki" <macro at codesourcery dot com>]

Hi,

 The gcc.target/arm/mmx-1.c test case relies on the ability to use iWMMXt 
instructions whose encodings overlap with those of the FPU unit.  The test 
cannot therefore be used whenever either or the "hard" or "softfp" 
floating-point ABIs is requested or implied, such as when either of the 
"-mcpu=iwmmxt -mfloat-abi=softfp" or "-mcpu=iwmmxt -mfloat-abi=hard" GCC 
option combinations are used.

 In current sources the test is excluded whenever either of 
"-mfloat-abi=softfp" or "-mfloat-abi=hard" is seen among GCC options 
passed.  It works when these are explicitly requested, however it does not 
fully cover the "hard" variation, which is implied for some 
configurations.

 Therefore I propose the following change to be included, that checks 
whether "-mcpu=iwmmxt" is compatible with other options used for the 
testsuite and will therefore cover all the cases, whether set by options 
used with the test suite or implied by GCC build-time configuration 
defaults.

 It was successfully tested for the arm-none-linux-gnueabi target, with 
the -mfloat-abi=softfp/-mfpu=vfp and -mfloat-abi=hard/-mfpu=vfp board 
options respectively, with no regressions.

gcc/testsuite/
2009-08-20  Maciej W. Rozycki  <macro@codesourcery.com>

	* lib/target-supports.exp
	(check_effective_target_arm_iwmmxt_ok): New procedure.
	* gcc.target/arm/mmx-1.c: Only run if arm_iwmmxt_ok.  Remove the 
	exclusions for -mfloat-abi=softfp and -mfloat-abi=hard.

 OK to apply?

  Maciej

gcc-4.5.0-arm-iwmmxt-1.patch
Index: gcc/testsuite/gcc.target/arm/mmx-1.c
===================================================================
--- gcc/testsuite/gcc.target/arm/mmx-1.c	(revision 258859)
+++ gcc/testsuite/gcc.target/arm/mmx-1.c	(working copy)
@@ -3,11 +3,10 @@
 /* { dg-do compile } */
 /* { dg-skip-if "Test is specific to the iWMMXt" { arm*-*-* } { "-mcpu=*" } { "-mcpu=iwmmxt" } } */
 /* { dg-skip-if "Test is specific to the iWMMXt" { arm*-*-* } { "-mabi=*" } { "-mabi=iwmmxt" } } */
-/* { dg-skip-if "Test is specific to the iWMMXt" { arm*-*-* } { "-mfloat-abi=softfp" } { "" } } */
-/* { dg-skip-if "Test is specific to the iWMMXt" { arm*-*-* } { "-mfloat-abi=hard" } { "" } } */
 /* { dg-skip-if "Test is specific to the iWMMXt" { arm*-*-* } { "-march=*" } { "-march=iwmmxt" } } */
 /* { dg-options "-O -mno-apcs-frame -mcpu=iwmmxt -mabi=iwmmxt" } */
 /* { dg-require-effective-target arm32 } */
+/* { dg-require-effective-target arm_iwmmxt_ok } */
 /* { dg-final { scan-assembler "ldmfd\[ 	]sp!.*ip,\[ ]*pc" } } */
 
 /* This function uses all the call-saved registers, namely r4, r5, r6,
Index: gcc/testsuite/lib/target-supports.exp
===================================================================
--- gcc/testsuite/lib/target-supports.exp	(revision 258859)
+++ gcc/testsuite/lib/target-supports.exp	(working copy)
@@ -1620,6 +1620,19 @@ proc check_effective_target_arm_eabi { }
     }]
 }
 
+# Return 1 if this is an ARM target supporting -mcpu=iwmmxt.
+# Some multilibs may be incompatible with this option.
+
+proc check_effective_target_arm_iwmmxt_ok { } {
+    if { [check_effective_target_arm32] } {
+	return [check_no_compiler_messages arm_iwmmxt_ok object {
+	    int dummy;
+	} "-mcpu=iwmmxt"]
+    } else {
+	return 0
+    }
+}
+
 # Return 1 if this is a PowerPC target with floating-point registers.
 
 proc check_effective_target_powerpc_fprs { } {