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Re: RFC: [ARM] Fix ICE with generation of movt and movw instructions.
- From: Richard Earnshaw <rearnsha at arm dot com>
- To: ramana dot radhakrishnan at arm dot com
- Cc: gcc-patches <gcc-patches at gcc dot gnu dot org>
- Date: Wed, 19 Aug 2009 13:55:39 +0100
- Subject: Re: RFC: [ARM] Fix ICE with generation of movt and movw instructions.
- References: <1250684937.31253.33.camel@e200593-lin.cambridge.arm.com>
On Wed, 2009-08-19 at 13:28 +0100, Ramana Radhakrishnan wrote:
> Hi,
>
> I hit an ICE in twolf SPEC2000 with trunk recently and by looking in gdb
> I can see that the ICE is in the printing of the constant pools and that
> we get a constant pool entry for a HIGH value.
>
>
> (insn 396 395 397 (unspec_volatile [
> (high:SI (const_int -10000000 [0xffffffffff676980]))
> ] 6) 333 {consttable_4} (nil))
>
>
> Instead of fixing the printer, what this patch does is to describe the
> movt pattern essentially as setting the top 16 bits using a zero_extract
> rather than as a lo_sum rtx and the setting of the higher 16 bits as a
> direct move rather than a high rtx. This we believe gives more
> opportunity for the combiner and other parts to optimize and combine
> things more. Without this patch in the original testcase the we end up
> matching *t / Uvi in *arm_movsi_vfp / *thumb_movsi_vfp.
>
> I've tested the attached patch on arm-none-eabi cross for a Cortex-A8 on
> qemu with no regressions. Ok to commit for trunk ?
>
>
> cheers
> Ramana
>
> 2009-08-19 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
> Richard Earnshaw <richard.earnshaw@arm.com>
>
> * config/arm/arm.c (arm_emit_movpair): Handle CONST_INT.
> * config/arm/arm.md (*arm_movtas_ze): New pattern for
> movt.
>
> 2009-08-19 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
> Richard Earnshaw <richard.earnshaw@arm.com>
>
> * testsuite/gcc.target/arm/20090811-1.c: New test.
OK
R.