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Re: RFA: Remove undocumented SH -mfmovd option
Hello Kaz,
It was fine to remove the option for the SH2A default build, I was just
asking not to demote this option as it is still useful on some SH silicons.
Removing the option by hard coding TARGET_MFMOVD,MASK_FMOVD is wrong,
Removing the ability to use and test the TARGET_FMOVD support will lead
inevitably to demote it because it will be unsupported.
Which BTW makes the ChangeLog entries :
"
Do not automatically
enable TARGET_MOVD for the SH2A when supporting doubles - leave
that to the -mfmovd command line switch.
"
false because TARGET_MOVD is always be forced to zero and the command
line switch is not recognized anymore :-(
So the best is to fix the documentation and keep the option active,
Note that the alignment constraint is not necessary as it depends on
PR/SZ FPSCR settings, and can also be fixed with the use of -mdalign. So
to avoid other future confusion, I add a reference to the -mdalign
option, since there are used together most often.
I propose to resurrect the option here. It keeps Nick's default setting
fix and __FMOVD_ENABLED__ macro, which is nice, but restore the ability
to use on other silicons.
Also adding a new test to make sure that the compiler is able to
generate fmov.d instruction under user request for architectures
supporting it
Is it OK ?
Many thanks
Christian
2009-07-17 Christian Bruel <christian.bruel@st.com>
* config/sh/sh.opt (-mfmovd): Resurrect and add -mdalign reference.
* doc/invoke.texi (-mfmovd): Likewise.
* config/sh/sh.h (TARGET_FMOVD, MASK_FMOVD): Remove default
setting.
2009-07-17 Christian Bruel <christian.bruel@st.com>
* gcc.target/sh/mfmovd.c: New test.
Kaz Kojima wrote:
Christian BRUEL <christian.bruel@st.com> wrote:
please don't remove this option, It is still in use in some of our ABIs,
for sh-superh-elf embedded platforms. If we have maintenance problems I
can volonteer to maintain it, but we still do actively use it (although
never set by default),
If the problem is documentation, I have this patch to apply :
Not only documentation issue. Please see Nick's original
message:
http://gcc.gnu.org/ml/gcc-patches/2009-07/msg00018.html
Some work will be needed for resurrecting that option.
Regards,
kaz
Index: gcc/doc/invoke.texi
===================================================================
--- gcc/doc/invoke.texi (revision 149734)
+++ gcc/doc/invoke.texi (working copy)
@@ -800,7 +800,7 @@
-m5-32media -m5-32media-nofpu @gol
-m5-compact -m5-compact-nofpu @gol
-mb -ml -mdalign -mrelax @gol
--mbigtable -mhitachi -mrenesas -mno-renesas -mnomacsave @gol
+-mbigtable -mfmovd -mhitachi -mrenesas -mno-renesas -mnomacsave @gol
-mieee -mbitops -misize -minline-ic_invalidate -mpadstruct -mspace @gol
-mprefergot -musermode -multcost=@var{number} -mdiv=@var{strategy} @gol
-mdivsi3_libfunc=@var{name} -mfixed-range=@var{register-range} @gol
@@ -15306,6 +15306,11 @@
@opindex mbitops
Enable the use of bit manipulation instructions on SH2A.
+@item -mfmovd
+@opindex mfmovd
+Enable the use of the instruction @code{fmovd}. Check @option{-mdalign} for
+alignment constraints.
+
@item -mhitachi
@opindex mhitachi
Comply with the calling conventions defined by Renesas.
Index: gcc/config/sh/sh.h
===================================================================
--- gcc/config/sh/sh.h (revision 149734)
+++ gcc/config/sh/sh.h (working copy)
@@ -28,11 +28,6 @@
#define TARGET_VERSION \
fputs (" (Hitachi SH)", stderr);
-#ifndef TARGET_FMOVD
-#define TARGET_FMOVD 0
-#define MASK_FMOVD 0
-#endif
-
/* Unfortunately, insn-attrtab.c doesn't include insn-codes.h. We can't
include it here, because bconfig.h is also included by gencodes.c . */
/* ??? No longer true. */
Index: gcc/config/sh/sh.opt
===================================================================
--- gcc/config/sh/sh.opt (revision 149734)
+++ gcc/config/sh/sh.opt (working copy)
@@ -244,6 +244,10 @@
Target RejectNegative Joined Var(sh_divsi3_libfunc) Init("")
Specify name for 32 bit signed division function
+mfmovd
+Target RejectNegative Mask(FMOVD)
+Enable the use of 64-bit floating point registers in fmov instructions. See -mdalign if 64-bit alignment is required.
+
mfixed-range=
Target RejectNegative Joined Var(sh_fixed_range_str)
Specify range of registers to make fixed
/* { dg-do compile { target "sh*-*-*" } } */
/* { dg-options "-mfmovd" } */
/* { dg-skip-if "" { "sh*-*-*" } "*" "-m2a-nofpu -m2a-single-only -m4-nofpu -m4-single-only" -m4a-nofpu -m4a-single-only" } */
/* { dg-final { scan-assembler "fmov.d"} } */
extern double g;
void
f (double d)
{
g = d;
}