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Re: PATCH: PR target/40470: unabl e to find a register to spill in class ‘SSE_FIRST_REG’

Peter Bergner wrote:
On Wed, 2009-06-17 at 17:33 -0700, Ian Lance Taylor wrote:
Vladimir Makarov <> writes:

I looked at this problem. It looks like

p666= xmm0
insn in the question (spill failure because it needs xmm0)
= p666, dead p666

The combiner removes p666=xmm0 and uses xmm0 instead of p666 in the
last insn.
That sounds like a bad idea, particularly if SMALL_REGISTER_CLASSES or

Of course it would be nice if ra/reload handled this sort of thing


If combine is "fixed", shouldn't the IRA coalescer coalesce p666 with
xmm0 (assuming no other xmm0 uses during p666's lifetime) giving HJ
the code he wants without having to force things into hardregs too
early?  Or doesn't the coalescer coalesce pseudos with hardregs?

Hi, Peter.

IRA should coalesce p666 and xmm0 by assigning xmm0 to p666. Assigning hard registers in IRA is a cost driven and xmm0 will have the smallest cost.

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