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Re: PowerPC -- single precision FP register constraint


David Edelsohn wrote:
On Wed, Jun 17, 2009 at 12:57 PM, Michael Eager<eager@eagercon.com> wrote:
David Edelsohn wrote:
Hi, Michael

This is getting closer.  I successfully bootstrapped on AIX.  The
constraints.md and rs6000.md changes look complete.  There are a few
remaining pieces that need to be cleaned up.

gcc/config/rs6000/dfp.md conversion looks incomplete.  rs6000.md uses
'd' for TFmode, so dfp.md should use 'd' for TDmode.  Also, negdd2_fpr
seems to have been missed and some of the movdd expanders still
mention 'f' constraints.

The ChangeLog should mention the ppu_intrinsics.h changes.

gcc/doc/md.texi section Machine Constraints for PowerPC should be
updated to mention the 'd' constraint and distinguish between 'd' and
'f'.  We need to find the right words to explain the difference
because they are interchangeable for targets that support the full
PowerPC architecture.  Maybe 'd' is a floating point register
containing a double precision value and 'f' is a floating point
register containing a single precision value.

Once I double-check those changes, I think the patch will be ready.
Great! Thanks for the review.

Michael,


This version of the patch is fine. Please go ahead and commit it.

NOTE: I fixed a bug in rs6000/dfp.md (using DFmode instead of DDmode
and TD mode) that I noticed while reviewing your patch, so you will
need to merge (and fix the conflict) before committing.

Thanks! Patch checked in.


--
Michael Eager	 eager@eagercon.com
1960 Park Blvd., Palo Alto, CA 94306  650-325-8077


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