This is the mail archive of the
mailing list for the GCC project.
Re: PATCH: PR target/40470: unabl e to find a register to spill in class ‘SSE_FIRST_REG’
Vladimir Makarov wrote:
IRA does not generate spill code for insn constraints. Reload does
it. To fix it in reload (spill and restore hard registers) is not a
trivial task and potentially distracting compiler stability for many
targets. So I'd rather avoid it even if it could solve other passes
problems like 1st insn scheduling for x86/x86_64.Is xmm0 the return value for the call? ie, is it the SET_DEST of the call?
The originally problem occurs in the combiner (it propagates xmm0
usage right after a call through the insn in question). So imho I
think the best way is to fix in the combiner.